1996 Microchip Technology Inc.
Preliminary
DS40122B-page 43
PIC14000
FIGURE 7-3:
I2CCON: I2C PORT CONTROL REGISTER
I2CM<3:0>: I2C mode select
0110 = I2C slave mode, 7-bit address
0111 = I2C slave mode, 10-bit address
1011 = I2C rmware controlled master mode (slave idle)
1110 = I2C slave mode, 7-bit address with start and stop bit interrupts
enabled
1111 = I2C slave mode, 10-bit address with start and stop bit interrupts
enabled
CKP: Clock polarity select
SCK release control
1 = Enable clock
0 = Holds clock low (clock stretch)
Note: Used to ensure data setup time
I2CEN: I2C enable
1 = Enables the serial port and congures SDA and SCL pins as serial
port pins. When enabled, these pins must be congured as input
0 = Disables serial port and congures these pins as I/O port pins
I2COV: Receive overow ag
1 = A byte is received while the I2CBUF is still holding the previous
byte. I2COV is a don't care in transmit mode.
I2COV must be cleared in software.
WCOL: Write collision detect
1 = the I2CBUF register is written while it is still transmitting the previ-
ous word.
Must be cleared in software.
0 = No collision
bit0
bit7
R/W
I2CM3
R/W
I2CEN
R/W
CKP
R/W
I2CM2
R/W
I2CM1
R/W
I2CM0
R/W
I2COV
R/W
WCOL
Register:
I2CCON
W: Writable bit
R: Readable bit
U: Unimplemented, read as ‘0’
Address:
14h
POR value:
00h
Any other combinations of I2CM<3:0>
are illegal and should NEVER be used.
or output.
0 = No overow