PIC14000
DS40122B-page 42
Preliminary
1996 Microchip Technology Inc.
FIGURE 7-2:
I2CSTAT: I2C PORT STATUS REGISTER
BF: Buffer full
Receive
1 = Receive complete, I2CBUF is full
0 = Receive not complete, I2CBUF is empty
Transmit
1 = Transmit in progress, I2CBUF is full
0 = Transmit complete, I2CBUF is empty
UA: Update Address (10-bit I2C slave mode only)
1 = Indicate that the user needs to update the address in the I2CADD
register.
0 = Address does not need to be updated
R/
W: Read/write bit information
This bit holds the R/W bit information received following the last address
match. This bit is only valid during the transmission.
The user may use this bit in software to determine whether transmission
or reception is in progress.
1 = Read
0 = Write
S: Start bit
This bit is cleared when the I2C module is disabled (I2CEN is cleared)
1 = Indicates that a start bit has been detected last. This bit is 0 on
reset.
0 = Start bit was not detected last
P: Stop bit
This bit is cleared when the I2C module is disabled (I2CEN is cleared)
1 = Indicates that a stop bit has been detected last.
0 = Stop bit was not detected last
D/
A: Data/Address bit
1 = Indicates that the last byte received was data
0 = Indicates that the last byte received was address
Unimplemented: read as ‘0’
U
_
bit0
bit7
Register:
I2CSTAT
W: Writable bit
R
S
U
_
R
D/A
R
P
R
R/W
R
UA
R
BF
R: Readable bit
U: Unimplemented, read as ‘0’
Address:
94h
POR value:
00h