參數(shù)資料
型號(hào)： PIC12F683-I/SN
廠商： Microchip Technology
文件頁(yè)數(shù)： 131/176頁(yè)
文件大?。?/td> 0K
描述： IC MCU FLASH 2KX14 8SOIC
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
Digi-Key 應(yīng)用說(shuō)明： AN0005 PWM Example with Microchip's CCP Module
AN0005 Example Code
標(biāo)準(zhǔn)包裝： 100
系列： PIC® 12F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 5
程序存儲(chǔ)器容量： 3.5KB（2K x 14）
程序存儲(chǔ)器類(lèi)型： 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
包裝： 管件
產(chǎn)品目錄頁(yè)面： 645 (CN2011-ZH PDF)
配用： AC162058-ND - HEADER MPLAB ICD2 FOR PIC12F683
I3-DB12F683-ND - BOARD DAUGHTER ICEPIC3
其它名稱(chēng)： PIC12F683-I/SNG
PIC12F683-I/SNG-ND
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PIC12F683
DS41211D-page 56
2007 Microchip Technology Inc.
8.7
Operation During Sleep
The comparator, if enabled before entering Sleep mode,
remains active during Sleep. The additional current
consumed by the comparator is shown separately in
If
the
comparator is not used to wake the device, power
consumption can be minimized while in Sleep mode by
turning off the comparator. The comparator is turned off
by selecting mode CM<2:0> = 000 or CM<2:0> = 111
of the CMCON0 register.
A change to the comparator output can wake-up the
device from Sleep. To enable the comparator to wake
the device from Sleep, the CMIE bit of the PIE1 register
and the PEIE bit of the INTCON register must be set.
The instruction following the Sleep instruction always
executes following a wake from Sleep. If the GIE bit of
the INTCON register is also set, the device will then
execute the Interrupt Service Routine.
8.8
Effects of a Reset
A device Reset forces the CMCON0 and CMCON1
registers to their Reset states. This forces the Compar-
ator module to be in the Comparator Reset mode
(CM<2:0> = 000). Thus, all comparator inputs are
analog inputs with the comparator disabled to consume
the smallest current possible.
REGISTER 8-1:
CMCON0: COMPARATOR CONFIGURATION REGISTER
U-0
R-0
U-0
R/W-0
—COUT
—
CINV
CIS
CM2
CM1
CM0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6
COUT: Comparator Output bit
When CINV = 0:
1
= VIN+ > VIN-
0
= VIN+ < VIN-
When CINV = 1:
1
= VIN+ < VIN-
0
= VIN+ > VIN-
bit 5
Unimplemented: Read as ‘0’
bit 4
CINV: Comparator Output Inversion bit
1
= Output inverted
0
= Output not inverted
bit 3
CIS: Comparator Input Switch bit
When CM<2:0> = 110 or 101:
1
= CIN+ connects to VIN-
0
= CIN- connects to VIN-
When CM<2:0> = 0xx or 100 or 111:
CIS has no effect.
bit 2-0
CM<2:0>: Comparator Mode bits (See Figure 8-5)
000
= CIN pins are configured as analog, COUT pin configured as I/O, Comparator output turned off
001
= CIN pins are configured as analog, COUT pin configured as Comparator output
010
= CIN pins are configured as analog, COUT pin configured as I/O, Comparator output available internally
011
= CIN- pin is configured as analog, CIN+ pin is configured as I/O, COUT pin configured as
Comparator output, CVREF is non-inverting input
100
= CIN- pin is configured as analog, CIN+ pin is configured as I/O, COUT pin is configured as I/O, Comparator output
available internally, CVREF is non-inverting input
101
= CIN pins are configured as analog and multiplexed, COUT pin is configured as
Comparator output, CVREF is non-inverting input
110
= CIN pins are configured as analog and multiplexed, COUT pin is configured as I/O,
Comparator output available internally, CVREF is non-inverting input
111
= CIN pins are configured as I/O, COUT pin is configured as I/O, Comparator output disabled, Comparator off.
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