參數(shù)資料
型號： PI7C8152B
英文描述： PCI Bridge | Asynchronous 2-Port PCI Bridge
中文描述： PCI橋|異步2端口PCI橋
文件頁數(shù)： 68/115頁
文件大?。?/td> 879K
代理商： PI7C8152B
PI7C8150B
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 68 of 115
July 31, 2003 – Revision 1.031
The first transaction to establish LOCK_L must be Memory Read. If the first transaction is
not Memory read, the following transactions behave accordingly:
!
Type 0 Configuration Read/Write induces master abort
!
Type 1 Configuration Read/Write induces master abort
!
I/O Read induces master abort
!
I/O Write induces master abort
!
Memory Write induces master abort
When PI7C8150B receives a target abort or a master abort in response to the delayed
locked read transaction, this status is passed back to the initiator, and no locks are
established on either the target or the initiator bus. PI7C8150B resumes forwarding
unlocked transactions in both directions.
7.2.2
LOCKED TRANSACTION IN UPSTREAM DIRECTION
PI7C8150B ignores upstream lock and transactions. PI7C8150B will pass these
transactions as normal transactions without lock established.
7.3
ENDING EXCLUSIVE ACCESS
After the lock has been acquired on both initiator and target buses, PI7C8150B must
maintain the lock on the target bus for any subsequent locked transactions until the initiator
relinquishes the lock.
The only time a target-retry causes the lock to be relinquished is on the first transaction of a
locked sequence. On subsequent transactions in the sequence,
the target retry has no effect on the status of the lock signal.
An established target lock is maintained until the initiator relinquishes the lock.
PI7C8150B does not know whether the current transaction is the last one in a sequence of
locked transactions until the initiator de-asserts the LOCK_L signal at end of the
transaction.
When the last locked transaction is a delayed transaction, PI7C8150B has already
completed the transaction on the target bus. In this example, as soon as PI7C8150B detects
that the initiator has relinquished the LOCK_L signal by sampling it in the de-asserted state
while FRAME_L is de-asserted, PI7C8150B de-asserts the LOCK_L signal on the target
bus as soon as possible. Because of this behavior, LOCK_L may not be de-asserted until
several cycles after the last locked transaction has been completed on the target bus. As
soon as PI7C8150B has de-asserted LOCK_L to indicate the end of a sequence of locked
transactions, it resumes forwarding unlocked transactions.
When the last locked transaction is a posted write transaction, PI7C8150B de-asserts
LOCK_L on the target bus at the end of the transaction because the lock was relinquished
at the end of the write transaction on the initiator bus.
相關(guān)PDF資料
PDF描述
PI7C8154 PCI Bridge | 2-Port PCI-to-PCI Bridge
PI7C8154-33 PCI Bridge | 2-Port PCI-to-PCI Bridge
PI7C8150 PCI Bridge | 2-Port PCI-to-PCI Bridge
PI7C8150-33 PCI Bridge | 2-Port PCI-to-PCI Bridge
PI7C8150A PCI Bridge | 2-Port PCI-to-PCI Bridge
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C8152BEVB 功能描述:界面開發(fā)工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
PI7C8152BMA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 160-Pin MQFP
PI7C8152BMAE 功能描述:外圍驅(qū)動器與原件 - PCI PCI -to -PCI Bridge 2 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8152BMAIE 功能描述:外圍驅(qū)動器與原件 - PCI 2 Port PCI to PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8154 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCI Bridge | 2-Port PCI-to-PCI Bridge
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