參數(shù)資料
型號： PI7C8150BMAIE
廠商： Pericom
文件頁數(shù)： 101/109頁
文件大?。?/td> 0K
描述： IC PCI-PCI BRIDGE ASYNC 208-FQFP
標(biāo)準(zhǔn)包裝： 24
系列： *
應(yīng)用： *
接口： *
電源電壓： *
封裝/外殼： 208-BFQFP
供應(yīng)商設(shè)備封裝： 208-FQFP（28x28）
包裝： 管件
安裝類型： 表面貼裝
PI7C8150B
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 91 of 109
April 2009 – Revision 1.08
14.1.41
P_SERR_L STATUS REGISTER – OFFSET 68h
Bit
Function
Type
Description
16
Address Parity
Error
R/WC
1: Signal P_SERR_L was asserted because an address parity error
was detected on P or S bus.
Reset to 0
17
Posted Write
Data Parity Error
R/WC
1: Signal P_SERR_L was asserted because a posted write data parity
error was detected on the target bus.
Reset to 0
18
Posted Write
Non-delivery
R/WC
1: Signal P_SERR_L was asserted because the bridge was unable to
deliver post memory write data to the target after 2
24 attempts.
Reset to 0
19
Target Abort
during Posted
Write
R/WC
1: Signal P_SERR_L was asserted because the bridge received a
target abort when delivering post memory write data.
Reset to 0.
20
Master Abort
during Posted
Write
R/WC
1: Signal P_SERR_L was asserted because the bridge received a
master abort when attempting to deliver post memory write data
Reset to 0.
21
Delayed Write
Non-delivery
R/WC
1: Signal P_SERR_L was asserted because the bridge was unable to
deliver delayed write data after 2
24 attempts.
Reset to 0
22
Delayed Read –
No Data from
Target
R/WC
1: Signal P_SERR_L was asserted because the bridge was unable to
read any data from the target after 2
24 attempts.
Reset to 0.
23
Delayed
Transaction
Master Timeout
R/WC
1: Signal P_SERR_L was asserted because a master did not repeat a
read or write transaction before master timeout.
Reset to 0.
14.1.42
PORT OPTION REGISTER – OFFSET 74h
Bit
Function
Type
Description
0
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0.
1
Primary MEMR
Command Alias
Enable
R/W
Controls PI7C8150B’s detection mechanism for matching memory
read retry cycles from the initiator on the primary interface
0: exact matching for non-posted memory write retry cycles from
initiator on the primary interface
1: alias MEMRL or MEMRM to MEMR for memory read retry
cycles from the initiator on the primary interface
Reset to 0
2
Primary MEMW
Command Alias
Enable
R/W
Controls PI7C8150B’s detection mechanism for matching non-posted
memory write retry cycles from the initiator on the primary interface
0: exact matching for non-posted memory write retry cycles from
initiator on the primary interface
1: alias MEMWI to MEMW for non-posted memory write retry
cycles from initiator on the primary interface
Reset to 0
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PI7C8150BMAIE-33 功能描述:外圍驅(qū)動器與原件 - PCI 2 Port 32B PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8150BND 功能描述:外圍驅(qū)動器與原件 - PCI 2-Port 32-Bit PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8150BND-33 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
PI7C8150BNDE 功能描述:外圍驅(qū)動器與原件 - PCI 32-Bit PCI Bridge 2 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8150BNDI 功能描述:外圍驅(qū)動器與原件 - PCI 2-Port 32-Bit PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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