參數(shù)資料
型號: PI7C8150B
英文描述: PCI Bridge | Asynchronous 2-Port PCI Bridge
中文描述: PCI橋|異步2端口PCI橋
文件頁數(shù): 98/115頁
文件大小: 879K
代理商: PI7C8150B
PI7C8150B
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 98 of 115
July 31, 2003 – Revision 1.031
Bit
15:12
Function
Reserved
Type
R/O
Description
Reserved. Returns 0 when read. Reset to 0.
14.1.43
RETRY COUNTER REGISTER – OFFSET 78h
Bit
Function
Type
Description
Holds the maximum number of attempts that PI7C8150B will try
before reporting retry timeout. Retry count set at 2
24
PCI clocks.
Default is 0100 0000h.
31:0
Retry Counter
R/W
14.1.44
PRIMARY MASTER TIMEOUT COUNTER – OFFSET 80h
Bit
Function
Type
Description
Primary timeout occurs after 2
15
PCI clocks.
Reset to 8000h.
15:0
Primary Timeout
R/W
14.1.45
SECONDARY MASTER TIMEOUT COUNTER – OFFSET 80h
Bit
Function
Type
Description
Secondary timeout occurs after 2
15
PCI clocks.
Reset to 8000h.
31:16
Secondary
Timeout
R/W
14.1.46
CAPABILITY ID REGISTER – OFFSET B0h
Bit
Function
Type
Description
Capability ID for slot identification
00h: Reserved
01h: PCI Power Management (PCIPM)
02h: Accelerated Graphics Port (AGP)
03h: Vital Product Data (VPD)
04h: Slot Identification (SI)
05h: Message Signaled Interrupts (MSI)
06h: Compact PCI Hot Swap (CHS)
07h – 255h: Reserved
Reset to 04h
7:0
Capability ID
R/O
14.1.47
NEXT POINTER REGISTER – OFFSET B0h
Bit
Function
Type
Description
Reset to 0000 0000: next pointer (00h if MS0=0 and MS1=1, or
MS0=1)
15:8
Next Pointer
R/O
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