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參數(shù)資料
| 型號： | PE12316 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Triple Incremental Encoder |
| 中文描述： | 三增量編碼器 |
| 文件頁數(shù)： | 23/29頁 |
| 文件大?。?/td> | 1542K |
| 代理商： | PE12316 |
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PE12316
Triple
Incremental Encoder
February 6, 2003 Preliminary (Version 1.1)
Cascading to 32 Bits
February 6, 2003 (Preliminary Version 1.1)
Page 23/29
PE12316
Figure 14 Two Cascaded Channels (One 32-bit channel shown)
In systems requiring a higher resolution, two PE12316’s or two channels of the PE12316 can be
cascaded to achieve 32 bit accuracy
Figure 14
shows the block diagram of this application. It shows
the two PE12316 devices with one channel of each cascaded to 32 bit. The LS-word PE12316 is
operating in Mode 5 and the MS-word in Mode 0 (count only). The /KLI-KLO signals of each channel
are connected together with a pull up of 10k and can be used as an external freeze input. In this case,
the first external /KLI-KLO pulse, programming the PE12316 into the SLAVE mode, must occur before
the first read cycle, otherwise the device channel receiving the first read cycle will be programmed into
the master mode and generate a /KLI-KLO pulse for the second device. /UP1 and /DOWN1 of the first
device are tied to Vcc. Both /Ua01’s are connected together and can recover the zero pulse from the
resolver.
4
4
10k
10k
Ua11
Ua01
Ua21
Vcc
CS CLK
D0...D7
A0…A3
WE
UP1
DOWN1
Ua01
Ua21
Ua11
KLI-KLO
M01 M11 M21
RESET
1/3 PE12316
(LS-Word)
READY
RD
CARRY1
BORROW1
CS
CLK
D0...D7
A0…A3
WE
UP2
DOWN2
Ua02
Ua22
Ua12
KLI-KLO M02 M12 M22
RESET
1/3 PE12316
(MS-Word)
READY
RD
CARRY2
BORROW2
CAR
BOR
READY
FREEZE
RESET
CS
8-Bit Data Bus
A0/1/2/3 RD WR
CLK
D0...D7(MSB)
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