參數(shù)資料
型號(hào)： PE12316
廠商： Electronic Theatre Controls, Inc.
英文描述： Triple Incremental Encoder
中文描述： 三增量編碼器
文件頁數(shù)： 2/29頁
文件大小： 1542K
代理商： PE12316
PE12316
Triple
Incremental Encoder
February 6, 2003 Preliminary (Version 1.1)
Availability:
The PE12316 is available as a replacement IC or
Netlist IP Core, fully compatible with the TI
CF32006 functionality. The replacement IC is
packaged within the popular PLCC68.
February 6, 2003 (Preliminary Version 1.1)
Page 2/29
PE12316
The IP Core can be targeted to any desired
FPGA/CPLD or ASIC Technology and is
delivered within the according netlist format. The
database has been proven in a co-emulation
together with the reference part by stimulating
both devices with the same inputs and observing
the identical results on the outputs.
For FPGAs a technology with at least 20.000
FPGA Gates like XCS20 from Xilinx needs to be
chosen.
NOTE: If /A3 is left unconnected, PE12316 is
identical to CF32006.
Ressource Usage IP Core:
Gate
count
for
approximately 7000 Gates.
ASIC
Technologies
is
Enhancements over CF32006:
The PE12316 has 3 counters with 24 Bit
internally. Therefore an additional addressline
/A3 is introduced on pin 6 to select the Bits 16-
23 of each channel in conjunction with the other
addressbits A0-A2.
Differences:
The PE12316 has some slight changes:
UA1X and UA2X are synchronized with the
clock, eliminating the need to place a discrete
ACT74 type Flipflop in front of these signals.
Due to this feature a latency of one clock cycle is
introduced, resulting worst case in a +/-1 counter
difference.
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