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| 型號： | PCM1792A |
| 英文描述： | 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter |
| 中文描述： | 24位,192 - kHz的采樣，先進的部分，立體聲音頻數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 32/59頁 |
| 文件大?。?/td> | 500K |
| 代理商： | PCM1792A |
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SLES105B FEBRUARY 2004 REVISED NOVEMBER 2006
www.ti.com
32
OS[1:0]: Delta-Sigma Oversampling Rate Selection
These bits are available for read and write.
Default value: 00
OS[1:0]
00
01
10
11
Operation Speed Select
64 times f
S
(default)
32 times f
S
128 times f
S
Reserved
The OS bits are used to change the oversampling rate of delta-sigma modulation. Use of this function enables the designer
to stabilize the conditions at the post low-pass filter for different sampling rates. As an application example, programming
to set 128 times in 44.1-kHz operation, 64 times in 96-kHz operation, and 32 times in 192-kHz operation allows the use
of only a single type (cutoff frequency) of post low-pass filter. The 128 f
S
oversampling rate is not available at sampling rates
above 100 kHz. If the 128-f
S
oversampling rate is selected, a system clock of more than 256 f
S
is required.
In DSD mode, these bits are used to select the speed of the bit clock for DSD data coming into the analog FIR filter.
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 21
R/W
0
0
1
0
1
0
1
RSV
RSV
RSV
RSV
RSV
DZ1
DZ0
PCMZ
R/W: Read/Write Mode Select
When R/W = 0, a write operation is performed.
When R/W = 1, a read operation is performed.
Default value: 0
DZ[1:0]: DSD Zero Output Enable
These bits are available for read and write.
Default value: 00
DZ[1:0]
00
01
1x
Zero Output Enable
Disabled (default)
Even pattern detect
96
H
pattern detect
The DZ bits are used to enable or disable the output zero flags, and to select the zero pattern in the DSD mode.
PCMZ: PCM Zero Output Enable
These bits are available for read and write.
Default value: 1
PCMZ = 0
PCMZ = 1
PCM zero output disabled
PCM zero output enabled (default)
The PCMZ bit is used to enable or disable the output zero flags in the PCM mode and the external DF mode.
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 22
R
0
0
1
0
1
1
0
RSV
RSV
RSV
RSV
RSV
RSV
ZFGR
ZFGL
R: Read Mode Select
Value is always 1, specifying the readback mode.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCM1792ADB | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng AdvSegment Ster DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1792ADB | 制造商:Texas Instruments 功能描述:D/A CONVERTER (D-A) IC |
| PCM1792ADBG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24B 192kHz Sampling Adv Seg Aud St DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1792ADBR | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng AdvSegment Ster DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1792ADBRG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24B 192kHz Sampling Adv Seg Aud St DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
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