參數(shù)資料
型號(hào): PCM1792A
英文描述: 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
中文描述: 24位,192 - kHz的采樣,先進(jìn)的部分,立體聲音頻數(shù)字模擬轉(zhuǎn)換器
文件頁(yè)數(shù): 30/59頁(yè)
文件大?。?/td> 500K
代理商: PCM1792A
SLES105B FEBRUARY 2004 REVISED NOVEMBER 2006
www.ti.com
30
OPE: DAC Operation Control
This bit is available for read and write.
Default value: 0
OPE = 0
OPE = 1
DAC operation enabled (default)
DAC operation disabled
The OPE bit is used to enable or disable the analog output for both channels. Disabling the analog outputs forces them
to the bipolar zero level (BPZ) even if digital audio data is present on the input.
DFMS: Stereo DF Bypass Mode Select
This bit is available for read and write.
Default value: 0
DFMS = 0
DFMS = 1
Monaural (default)
Stereo input enabled
The DFMS bit is used to enable stereo operation in DF bypass mode. In the DF bypass mode, when DFMS is set to 0, the
pin for the input data is DATA (pin 5) only, therefore the PCM1792A operates as a monaural DAC. When DFMS is set to
1, the PCM1792A can operate as a stereo DAC with inputs of L-channel and R-channel data on ZEROL (pin 1) and ZEROR
(pin 2), respectively.
FLT: Digital Filter Rolloff Control
This bit is available for read and write.
Default value: 0
FLT = 0
FLT = 1
Sharp rolloff (default)
Slow rolloff
The FLT bit is used to select the digital filter rolloff characteristic. The filter responses for these selections are shown in the
TYPICAL PERFORMANCE CURVES
section of this data sheet.
INZD: Infinite Zero Detect Mute Control
This bit is available for read and write.
Default value: 0
INZD = 0
INZD = 1
Infinite zero detect mute disabled (default)
Infinite zero detect mute enabled
The INZD bit is used to enable or disable the zero detect mute function. Setting INZD to 1 forces muted analog outputs
to hold a bipolar zero level when the PCM1792A detects a zero condition in both channels. The infinite zero detect mute
function is disabled in the DSD mode.
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 20
R/W
0
0
1
0
1
0
0
RSV
SRST
DSD
DFTH
MONO
CHSL
OS1
OS0
R/W: Read/Write Mode Select
When R/W = 0, a write operation is performed.
When R/W = 1, a read operation is performed.
Default value: 0
相關(guān)PDF資料
PDF描述
PCM1792ADBRG4 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
PCM1792ADBR 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
PCM1794ADB 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
PCM1794ADBR 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
PCM1794A 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCM1792ADB 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng AdvSegment Ster DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
PCM1792ADB 制造商:Texas Instruments 功能描述:D/A CONVERTER (D-A) IC
PCM1792ADBG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24B 192kHz Sampling Adv Seg Aud St DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
PCM1792ADBR 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng AdvSegment Ster DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
PCM1792ADBRG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24B 192kHz Sampling Adv Seg Aud St DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel