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    • 您現(xiàn)在的位置:買賣IC網(wǎng) > PDF目錄385706 > PCF85176T (NXP SEMICONDUCTORS) Universal LCD driver for low multiplex rates PDF資料下載
    參數(shù)資料
    型號: PCF85176T
    廠商: NXP SEMICONDUCTORS
    元件分類: 顯示驅(qū)動器
    英文描述: Universal LCD driver for low multiplex rates
    中文描述: LIQUID CRYSTAL DISPLAY DRIVER, PDSO56
    封裝: 6.10 MM, PLASTIC, MO-153, SOT364-1, TSSOP-56
    文件頁數(shù): 7/47頁
    文件大?。?/td> 405K
    代理商: PCF85176T
    第1頁第2頁第3頁第4頁第5頁第6頁當(dāng)前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
    PCF85176
    All information provided in this document is subject to legal disclaimers.
    NXP B.V. 2011. All rights reserved.
    Product data sheet
    Rev. 2 — 27 June 2011
    7 of 47
    NXP Semiconductors
    PCF85176
    Universal LCD driver for low multiplex rates
    The host microcontroller maintains the 2-line I
    2
    C-bus communication channel with the
    PCF85176. The internal oscillator is enabled by connecting pin OSC to pin V
    SS
    . The
    appropriate biasing voltages for the multiplexed LCD waveforms are generated internally.
    The only other connections required to complete the system are the power supplies (V
    DD
    ,
    V
    SS
    , and V
    LCD
    ) and the LCD panel chosen for the application.
    7.1 Power-On Reset (POR)
    At power-on the PCF85176 resets to the following starting conditions:
    All backplane and segment outputs are set to V
    LCD
    The selected drive mode is: 1:4 multiplex with
    1
    3
    bias
    Blinking is switched off
    Input and output bank selectors are reset
    The I
    2
    C-bus interface is initialized
    The data pointer and the subaddress counter are cleared (set to logic 0)
    Display is disabled
    Remark:
    Do not transfer data on the I
    2
    C-bus for at least 1 ms after a power-on to allow
    the reset action to complete.
    7.2 LCD bias generator
    Fractional LCD biasing voltages are obtained from an internal voltage divider of three
    impedances connected between pins V
    LCD
    and V
    SS
    . The center impedance is bypassed
    by switch if the
    1
    2
    bias voltage level for the 1:2 multiplex drive mode configuration is
    selected.
    7.3 LCD voltage selector
    The LCD voltage selector coordinates the multiplexing of the LCD in accordance with the
    selected LCD drive configuration. The operation of the voltage selector is controlled by the
    mode-set command from the command decoder. The biasing configurations that apply to
    the preferred modes of operation, together with the biasing characteristics as functions of
    V
    LCD
    and the resulting discrimination ratios (D) are given in
    Table 5
    .
    The resistance of the power lines must be kept to a minimum.
    Fig 5.
    Typical system configuration
    HOST
    MICRO-
    PROCESSOR/
    MICRO-
    CONTROLLER
    t
    r
    2C
    B
    SDA
    SCL
    OSC
    40 segment drives
    4 backplanes
    LCD PANEL
    (up to 160
    elements)
    PCF85176
    A0
    A1
    A2
    SA0
    V
    DD
    V
    SS
    V
    SS
    V
    DD
    V
    LCD
    013aaa071
    R
    ≤
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