參數(shù)資料
型號: PCF85176T
廠商: NXP SEMICONDUCTORS
元件分類: 顯示驅(qū)動器
英文描述: Universal LCD driver for low multiplex rates
中文描述: LIQUID CRYSTAL DISPLAY DRIVER, PDSO56
封裝: 6.10 MM, PLASTIC, MO-153, SOT364-1, TSSOP-56
文件頁數(shù): 17/47頁
文件大小: 405K
代理商: PCF85176T
PCF85176
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 27 June 2011
17 of 47
NXP Semiconductors
PCF85176
Universal LCD driver for low multiplex rates
In static drive mode the same signal is carried by all four backplane outputs and they
can be connected in parallel for very high drive requirements.
7.10 Display RAM
The display RAM is a static 40
4-bit RAM which stores LCD data.
There is a one-to-one correspondence between
the bits in the RAM bitmap and the LCD elements
the RAM columns and the segment outputs
the RAM rows and the backplane outputs.
A logic 1 in the RAM bitmap indicates the on-state of the corresponding LCD element;
similarly, a logic 0 indicates the off-state.
The display RAM bit map,
Figure 12
, shows the rows 0 to 3 which correspond with the
backplane outputs BP0 to BP3, and the columns 0 to 39 which correspond with the
segment outputs S0 to S39. In multiplexed LCD applications the segment data of the first,
second, third and fourth row of the display RAM are time-multiplexed with BP0, BP1, BP2,
and BP3 respectively.
When display data is transmitted to the PCF85176, the received display bytes are stored
in the display RAM in accordance with the selected LCD drive mode. The data is stored as
it arrives and depending on the current multiplex drive mode the bits are stored singularly,
in pairs, triples, or quadruples. To illustrate the filling order, an example of a 7-segment
display showing all drive modes is given in
Figure 13
; the RAM filling organization
depicted applies equally to other LCD types.
The display RAM bitmap shows the direct relationship between the display RAM column and the
segment outputs; and between the bits in a RAM row and the backplane outputs.
Fig 12. Display RAM bit map
0
0
1
2
3
1
2
3
4
35
36
37
38
39
display RAM addresses (columns)/segment outputs (S)
display RAM bits
(rows)/
backplane outputs
(BP)
mbe525
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