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參數(shù)資料
| 型號： | PBL38773/1ML |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 模擬傳輸電路 |
| 英文描述： | TELECOM-SLIC, PQCC32 |
| 封裝： | PLASTIC, VQFN-32 |
| 文件頁數(shù)： | 55/64頁 |
| 文件大?。?/td> | 1052K |
| 代理商： | PBL38773/1ML |
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Ringing FlexiSLIC
PBL 38773/1
Control Inputs
Data Sheet
59
DS1, 2003-06-18
11
Control Inputs
The SLIC has three digital control inputs, C1, C2 and C3. A decoder in the SLIC
interprets the control input condition and determining the commanded operating state.
C1, C2 and C3 are internal pull-up inputs. The logic inputs are compatible with a 3.3 V
logic interface.
11.1
Open Circuit (C3, C2, C1 = 0, 0, 0)
In the Open Circuit the TIPX and RINGX line drive amplifiers as well as other circuit
blocks are powered down. This causes the SLIC to present a high impedance to the line.
Power dissipation is at a minimum and no detectors are active. DET output is set high.
11.2
Ringing (C3, C2, C1 = 0, 0, 1)
The low voltage ringing signal, which is connected to VR, is amplified and appears at
TIPX and RINGX as a balanced high voltage ring signal. The ring-trip detector monitors
hook status and sets the DET output low when off-hook line status is detected.
11.3
Active (C3, C2, C1 = 0, 1, 0)
TIPX is the terminal closest to ground and sources loop current while RINGX is the more
negative terminal and sinks loop current. The loop current detector is activated. The loop
current detector indicates off-hook with a logic low level present at the detector output.
11.4
Active, Loop Voltage Measurement (C3, C2, C1 = 0, 1, 1)
A frequency inversely proportional to the line voltage will appear at the DET output when
the SLIC is set to the active, loop voltage measurement state.
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