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參數(shù)資料
| 型號： | PA28F008SA-120 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY |
| 中文描述： | 1M X 8 FLASH 12V PROM, 120 ns, PDSO44 |
| 封裝： | 0.525 X 1.110 INCH, PLASTIC, SOP-44 |
| 文件頁數(shù)： | 30/33頁 |
| 文件大小： | 466K |
| 代理商： | PA28F008SA-120 |
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28F008SA
ALTERNATIVE CE
Y
-CONTROLLED WRITES
Versions
V
CC
g
5%
28F008SA-85
(6)
Unit
V
CC
g
10%
28F008SA-85
(7)
28F008SA-120
(7)
Symbol
Parameter
Notes
Min
Max
Min
Max
Min
Max
t
AVAV
t
WC
Write Cycle Time
85
90
120
ns
t
PHEL
t
PS
RP
Y
High Recovery to
CE
Y
Going Low
2
1
1
1
m
s
t
WLEL
t
WS
WE
Y
Setup to CE
Y
Going
Low
0
0
0
ns
t
ELEH
t
CP
CE
Y
Pulse Width
50
50
50
ns
t
VPEH
t
VPS
V
PP
Setup to CE
Y
Going
High
2
100
100
100
ns
t
AVEH
t
AS
Address Setup to CE
Y
Going High
3
40
40
40
ns
t
DVEH
t
DS
Data Setup to CE
Y
Going
High
4
40
40
40
ns
t
EHDX
t
DH
Data Hold from CE
Y
High
5
5
5
ns
t
EHAX
t
AH
Address Hold from CE
Y
High
5
5
5
ns
t
EHWH
t
WH
WE
Y
Hold from CE
Y
High
0
0
0
ns
t
EHEL
t
EPH
CE
Y
Pulse Width High
25
25
25
ns
t
EHRL
CE
Y
High to RY/BY
Y
Going Low
100
100
100
ns
t
EHQV1
Duration of Byte Write
Operation
5
6
6
6
m
s
t
EHQV2
Duration of Block Erase
Operation
5
0.3
0.3
0.3
sec
t
EHGL
Write Recovery before
Read
0
0
0
m
s
t
QVVL
t
VPH
V
PP
Hold from Valid SRD,
RY/BY
Y
High
2, 5
0
0
0
ns
NOTES:
1. Chip-Enable Controlled Writes: Write operations are driven by the valid combination of CE
Y
and WE
Y
. In systems where
CE
Y
defines the write pulsewidth (within a longer WE
Y
timing waveform), all setup, hold and inactive WE
Y
times should be
measured relative to the CE
Y
waveform.
2. Sampled, not 100% tested.
3. Refer to Table 3 for valid A
IN
for byte write or block erasure.
4. Refer to Table 3 for valid D
IN
for byte write or block erasure.
5. Byte write and block erase durations are measured to completion (SR.7
e
1, RY/BY
Y
e
V
OH
). V
PP
should be held at
V
PPH
until determination of byte write/block erase success (SR.3/4/5
e
0)
6. See High Speed AC Input/Output Reference Waveforms and High Speed AC Testing Load Circuits for testing characteris-
tics.
7. See AC Input/Output Reference Waveforms and AC Testing Load Circuits for testing characteristics.
30
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PA28F008SA85 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intel 功能描述: |
| PA28F008SA-85 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:8-MBIT (1-MBIT x 8) FlashFileTM MEMORY |
| PA28F008SA-L200 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
| PA28F008SA-L250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
| PA28F008SC-120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:BYTE-WIDE SmartVoltage FlashFile⑩ MEMORY FAMILY 4, 8, AND 16 MBIT |
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