參數(shù)資料
型號: P89V662FBC,557
廠商: NXP Semiconductors
文件頁數(shù): 73/90頁
文件大小: 0K
描述: IC 80C51 MCU FLASH 32K 44-TQFP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝: 800
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
配用: 622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP
其它名稱: 568-2435
568-2435-ND
568-8271
935280832557
P89V662FBC
P89V660_662_664
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3.1 — 17 October 2011
75 of 90
NXP Semiconductors
P89V660/662/664
80C51 with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI
9.1 Explanation of symbols
Each timing symbol has 5 characters. The first character is always a ‘T’ (stands for time).
The other characters, depending on their positions, stand for the name of a signal or the
logical status of that signal. The following is a list of all the characters and what they stand
for.
A — Address
C — Clock
D — Input data
H — Logic level HIGH
I — Instruction (program memory contents)
L — Logic level LOW or ALE
P — PSEN
Q — Output data
R — RD signal
T — Time
V — Valid
W — WR signal
X — No longer a valid logic level
Z — High impedance (Float)
Example:
tAVLL = Address valid to ALE LOW time
tLLPL = ALE LOW to PSEN LOW time
Fig 36. External program memory read cycle
002aaa548
port 2
PSEN
ALE
A0 to A7
tLLAX
tPLAZ
tPXIZ
tLLPL
tAVIV
tAVLL
tLLIV
tPLIV
tPLPH
INSTR IN
A8 to A15
A0 to A7
port 0
tPXIX
tPXAV
tLHLL
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P89V664FA,512 功能描述:8位微控制器 -MCU 80C51 64K FL / 2K RM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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