參數(shù)資料
型號(hào): P89LPC938FDH
廠(chǎng)商: NXP Semiconductors N.V.
元件分類(lèi): 8位微控制器
英文描述: 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable Flash with 10-bit A-D converter
封裝: P89LPC938FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1<Always Pb-free,;P89LPC938FHN<SOT788-1 (HVQFN28)|<<http://www.nxp.com/packages/SOT788-1.html&
文件頁(yè)數(shù): 68/68頁(yè)
文件大?。?/td> 318K
代理商: P89LPC938FDH
9397 750 14051
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 25 February 2005
9 of 68
Philips Semiconductors
P89LPC938
8-bit microcontroller with 10-bit A/D converter
P1.3/INT0/SDA
11
7
I/O
P1.3 — Port 1 bit 3 (open-drain when used as output).
I
INT0 — External interrupt 0 input.
I/O
SDA — I2C serial data input/output.
P1.4/INT1
10
6
I
P1.4 — Port 1 bit 4.
I
INT1 — External interrupt 1 input.
P1.5/RST
6
2
I
P1.5 — Port 1 bit 5 (input only).
I
RST — External Reset input during power-on or if selected via UCFG1.
When functioning as a reset input, a LOW on this pin resets the
microcontroller, causing I/O ports and peripherals to take on their default
states, and the processor begins execution at address 0. Also used
during a power-on sequence to force In-System Programming mode.
When using an oscillator frequency above 12 MHz, the reset input
function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until VDD has reached its
specied level. When system power is removed VDD will fall below
the minimum specied operating voltage. When using an oscillator
frequency above 12 MHz, in some applications, an external
brownout detect circuit may be required to hold the device in reset
when VDD falls below the minimum specied operating range.
P1.6/OCB
5
1
I/O
P1.6 — Port 1 bit 6.
O
OCB — Output Compare B.
P1.7/OCC/
AD04
4
28
I/O
P1.7 — Port 1 bit 7.
O
OCC — Output Compare C.
I
AD04 — ADC0 channel 4 analog input.
P2.0 to P2.7
I/O
Port 2: Port 2 is an 8-bit I/O port with a user-congurable output type.
During reset Port 2 latches are congured in the input only mode with the
internal pull-up disabled. The operation of Port 2 pins as inputs and
outputs depends upon the port conguration selected. Each port pin is
congured independently. Refer to Section 7.13.1 “Port congurations”
All pins have Schmitt triggered inputs.
Port 2 also provides various special functions as described below:
P2.0/ICB/AD07
1
25
I/O
P2.0 — Port 2 bit 0.
I
ICB — Input Capture B.
I
AD07 — ADC0 channel 7 analog input.
P2.1/OCD/
AD06
2
26
I/O
P2.1 — Port 2 bit 1.
O
OCD — Output Compare D.
I
AD06 — ADC0 channel 6 analog input.
P2.2/MOSI
13
9
I/O
P2.2 — Port 2 bit 2.
I/O
MOSI — SPI master out slave in. When congured as master, this pin is
output; when congured as slave, this pin is input.
P2.3/MISO
14
10
I/O
P2.3 — Port 2 bit 3.
I/O
MISO — When congured as master, this pin is input, when congured
as slave, this pin is output.
Table 3:
Pin description …continued
Symbol
Pin
Type Description
TSSOP28,
PLCC28
HVQFN28
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P89LPC938FDH529 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 18MHZ TSSOP-28
P89LPC938FHN 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable Flash with 10-bit A/D converter
P89LPC938FHN,151 功能描述:8位微控制器 -MCU 8K FL/768B RAM/512B RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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