參數(shù)資料
型號(hào)： P89LPC932FDH
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB Flash with 512-byte data EEPROM and 768-byte RAM
中文描述： 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PDSO28
封裝： 4.40 MM, PLASTIC, MO-153, SOT-361-1, TSSOP-28
文件頁(yè)數(shù)： 17/64頁(yè)
文件大?。?/td> 316K
代理商： P89LPC932FDH
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Special function registers
…continued
* indicates SFRs that are bit addressable.
Name
Description
SFR
addr.
MSB
9
P
R
1
P
P
8
[1]
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
[2]
All ports are in input only (high-impedance) state after power-up.
[3]
The RSTSRC register reflects the cause of the P89LPC932A1 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value is
xx110000.
[4]
The only reset source that affects these SFRs is power-on reset.
[5]
On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
[6]
After reset, the value is 111001x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.
Other resets will not affect WDTOF.
TISE2
CCU interrupt status encode
register
Timer 0 low
Timer 1 low
CCU timer low
Timer 0 and 1 mode
CCU reload register high
CCU reload register low
Prescaler control register
high
Prescaler control register low
DEH
-
-
-
-
-
ENCINT.
2
ENCINT.
1
ENCINT.
0
00
xxxx x000
TL0
TL1
TL2
TMOD
TOR2H
TOR2L
TPCR2H
8AH
8BH
CCH
89H
CFH
CEH
CBH
00
00
00
00
00
00
00
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xx00
T1GATE
T1C/T
T1M1
T1M0
T0GATE
T0C/T
T0M1
T0M0
-
-
-
-
-
-
TPCR2H.
1
TPCR2L.
1
TRIM.1
WDTOF
TPCR2H.
0
TPCR2L.
0
TRIM.0
WDCLK
TPCR2L
CAH
TPCR2L.
7
RCCLK
PRE2
TPCR2L.
6
ENCLK
PRE1
TPCR2L.
5
TRIM.5
PRE0
TPCR2L.
4
TRIM.4
-
TPCR2L.
3
TRIM.3
-
TPCR2L.
2
TRIM.2
WDRUN
00
0000 0000
TRIM
WDCON
WDL
WFEED1
WFEED2
Internal oscillator trim register
Watchdog control register
Watchdog load
Watchdog feed 1
Watchdog feed 2
96H
A7H
C1H
C2H
C3H
[5] [4]
[6] [4]
FF
1111 1111
Table 4:
Bit functions and addresses
Reset value
Hex
LSB
Binary
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