參數(shù)資料
型號: P89LPC917
廠商: NXP Semiconductors N.V.
英文描述: 8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V Flash with 8-bit A/D converter
中文描述: 8 - 8加速雙位單片機(jī)80C51的時鐘核心2 Kb的3伏閃存位A / D轉(zhuǎn)換器
文件頁數(shù): 51/72頁
文件大小: 344K
代理商: P89LPC917
Philips Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
Product data
Rev. 04 — 17 December 2004
51 of 72
9397 750 14397
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.21 Analog comparators
Two analog comparators are provided on the P89LPC915/916/917. Input and output
options allow use of the comparators in a number of different configurations.
Comparator operation is such that the output is a logic 1 when the positive input is
greater than the negative input (selectable from a pin or an internal reference
voltage). Otherwise the output is a zero. Each comparator may be configured to
cause an interrupt when the output value changes. Comparator 1 may be output to a
port pin.
The overall connections to both comparators are shown in
Figure 20
. The
comparators function to V
DD
= 2.4 V.
When each comparator is first enabled, the comparator output and interrupt flag are
not guaranteed to be stable for 10 microseconds. The corresponding comparator
interrupt should not be enabled during that time, and the comparator interrupt flag
must be cleared before the interrupt is enabled in order to prevent an immediate
interrupt service.
9.22 Internal reference voltage
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to
as V
REF
, is 1.23 V
±
10 %.
9.23 Comparator interrupt
Each comparator has an interrupt flag contained in its configuration register. This flag
is set whenever the comparator output changes state. The flag may be polled by
software or may be used to generate an interrupt. The two comparators use one
common interrupt vector. If both comparators enable interrupts, after entering the
interrupt service routine, the user needs to read the flags to determine which
comparator caused the interrupt.
Fig 20. Comparator input and output connections.
Comparator 1
CP1
CN1
(P0.4) CIN1A
(P0.3) CIN1B
(P0.5) CMPREF
VREF
Change Detect
CO1
CMF1
Interrupt
002aaa835
EC
Change Detect
CMF2
Comparator 2
OE2
CO2
CMP2 (P0.0)
(P89LPC915/917)
CP2
CN2
(P0.2) CIN2A
(P0.1) CIN2B
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