參數(shù)資料
型號： P89CE558EFB
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Single-chip 8-bit microcontroller
中文描述： FLASH, 8 MHz, MICROCONTROLLER, PQFP80
文件頁數(shù)： 39/72頁
文件大小： 721K
代理商： P89CE558EFB
Philips Semiconductors
Preliminary specification
P83CE558/P80CE558/P89CE558
Single-chip 8-bit microcontroller
1996 Aug 06
39
Figure 36. Interrupt enable register (IEN1).
7
6
5
4
3
2
1
0
IEN1 (E8H)
ET2
ECM2
ECM1
ECM0
ECT3
ECT2
ECT1
ECT0
Table 34.
Description of IEN1 bits
SYMBOL
BIT
FUNCTION
ET2
IEN1.7
Enable T2 overflow interrupt(s)
ECM2
IEN1.6
Enable T2 comparator 2 interrupt
ECM1
IEN1.5
Enable T2 comparator 1 interrupt
ECM0
IEN1.4
Enable T2 comparator 0 interrupt
ECT3
IEN1.3
Enable T2 capture register 3 interrupt
ECT2
IEN1.2
Enable T2 capture register 2 interrupt
ECT1
IEN1.1
Enable T2 capture register 1 interrupt
ECT0
IEN1.0
Enable T2 capture register 0 interrupt
If the enable bit is 0, then the interrupt is disabled, if the enable bit is 1, then the interrupt is enabled.
Figure 37. Interrupt priority register (IP0).
7
6
5
4
3
2
1
0
IP0 (B8H)
–
PAD
PS1
PS0
PT1
PX1
PT0
PX0
Table 35.
Description of IP0 bits
SYMBOL
BIT
FUNCTION
–
IP0.7
Reserved for future use
PAD
IP0.6
ADC interrupt priority level
SIO1 (I
2
C) interrupt priority level
PS1
IP0.5
PS0
IP0.4
SIO0 (UART) interrupt priority level
PT1
IP0.3
Timer 1 interrupt priority level
PX1
IP0.2
External interrupt 1/Seconds interrupt priority level
PT0
IP0.1
Timer 0 interrupt priority level
PX0
IP0.0
External interrupt 0 priority level
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