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參數(shù)資料
| 型號(hào)： | P89CE558EFB |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | Single-chip 8-bit microcontroller |
| 中文描述： | FLASH, 8 MHz, MICROCONTROLLER, PQFP80 |
| 文件頁(yè)數(shù)： | 23/72頁(yè) |
| 文件大?。?/td> | 721K |
| 代理商： | P89CE558EFB |
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Philips Semiconductors
Preliminary specification
P83CE558/P80CE558/P89CE558
Single-chip 8-bit microcontroller
1996 Aug 06
23
Figure 20. Timer/Counter mode control (TCON) register.
7
6
5
4
3
2
1
0
TCON (88H)
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Table 14.
Description of TCON bits
SYMBOL
BIT
FUNCTION
TF1
TCON.7
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when processor
vectors to interrupt routine.
TR1
TCON.6
Timer 1 run control bit. Set/cleared by software to turn Timer/Counter on/off.
TF0
TCON.5
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when processor
vectors to interrupt routine.
TR0
TCON.4
Timer 0 run control bit. Set/cleared by software to turn Timer/Counter on/off.
IE1
TCON.3
Interrupt 1 edge flag. Set by hardware when external interrupt edge detected. Cleared when interrupt
processed.
IT1
TCON.2
Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered external interrupts.
IE0
TCON.1
Interrupt 0 edge flag. Set by hardware when external interrupt edge detected. Cleared when interrupt
processed.
IT0
TCON.0
Interrupt 0 type control bit. Set/cleared by software to specify falling edge/low level triggered external interrupts.
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