參數(shù)資料
型號: P87C591VFB
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 27 PF 5% 50V NPO/COG (0805) CHIP CAP TR
中文描述: 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 X 1.75 MM, PLASTIC, QFP-44
文件頁數(shù): 11/161頁
文件大?。?/td> 588K
代理商: P87C591VFB
1999 Aug 19
11
Philips Semiconductors
Objective Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
Notes
1.
To avoid “l(fā)atch-up” effect as power-on, the voltage on any pin at any time must not be higher or lower than V
DD
+
0.5 V
or V
SS
0.5 V.
Not implemented for P1.6 and P1.7.
2.
P1.0 to P1.4
P1.5 to P1.7
40 to 44
1 to 3
2 to 6
7 to 9
Port 1:
8-bit I/O port with a user configurable output type. The operation of
Port 1 pins as inputs or outputs depends upon the port configuration selected.
Each port pin is configured independently.
Port 1 also provides various special functions as described below:
RXDC:
CAN Receiver input line.
TXDC:
CAN Transmit output line.
During reset, Port P1.0 and P1.1 will be asynchronously driven resistive
HIGH, P1.2 to P1.7 is High-Impedance (Tri-state).
CT0I/INT2 / CT1I/INT3 / CT2I/INT4:
T2 Capture timer inputs or External
Interrupt inputs.
ADC0 to ADC2:
Alternate function: Input channels to ADC.
P1.0
P1.1
40
41
2
3
P1.2 to P1.4
42 to 44 4 to 6
P1.5 to P1.7
P1.5
P1.6
P1.7
1 to 3
1
2
3
7 to 9
7
8
9
ADC3 to ADC5:
Input channels to ADC:
CT3I/INT5:
T2 Capture timer input or External Interrupt inputs.
SCL:
Serial port clock line I
2
C.
SDA:
Serial data clock line I
2
C.
Port 1 has four modes selected on a per bit basis by writing to the P1M1 and
P1M2 registers as follows:
P1M1.x
0
0
1
1
1
High impedance
Open drain
Port 1 is also used to input the lower order address byte during EPROM
programming and verification. A0 is on P1.0, etc.
Pulse Width Modulation:
Output 0.
Pulse Width Modulation:
Output 1.
P1M2.x
0
1
0
Mode Description
Pseudo-bidirectional (standard c51 configuration default
(2)
)
Push-Pull
(2)
PWM0
PWM1
6
28
12
34
SYMBOL
PIN
DESCRIPTION
QFP44
PLCC44
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