參數(shù)資料
型號(hào)： P87C554SFBD
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
中文描述： 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP64
封裝： 10 X 10 X 1.40 MM, PLASTIC, LQFP-64
文件頁數(shù)： 41/76頁
文件大小： 400K
代理商： P87C554SFBD
Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I
2
C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
41
A
DATA
S
SLA
R
A
08H
40H
50H
38H
A or A
OTHER MST
CONTINUES
OTHER MST
CONTINUES
38H
48H
68H
78H
80H
OTHER MST
CONTINUES
A
MR
10H
TO MST/TRX MODE
ENTRY = MT
TO CORRESPONDING
STATES IN SLAVE MODE
SUCCESSFUL RECEPTION
FROM A SLAVE TRANSMITTER
NEXT TRANSFER STARTED WITH A
REPEATED START CONDITION
NOT ACKNOWLEDGE RECEIVED
AFTER THE SLAVE ADDRESS
ARBITRATION LOST IN SLAVE ADDRESS
OR ACKNOWLEDGE BIT
ARBITRATION LOST AND ADDRESSED AS SLAVE
DATA
n
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
ANY NUMBER OF DATA BYTES AND THEIR ASSOCIATED ACKNOWLEDGE BITS
THIS NUMBER (CONTAINED IN S1STA) CORRESPONDS TO A DEFINED STATE OF THE I
2
C BUS. SEE TABLE 7.
58H
A
SU00972
Figure 41. Format and States in the Master Receiver Mode
相關(guān)PDF資料
PDF描述
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