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參數(shù)資料
| 型號： | P87C554SFBD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| 中文描述： | 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 10 X 10 X 1.40 MM, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 37/76頁 |
| 文件大?。?/td> | 400K |
| 代理商： | P87C554SFBD |
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Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I
2
C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
37
INTERNAL BUS
8
BSD7
S1DAT
ACK
SCL
SDA
SHIFT PULSES
SU00969
Figure 38. Serial Input/Output Configuration
SHIFT IN
SDA
SCL
D7
D6
D5
D4
D3
D2
D1
D0
A
SHIFT ACK & S1DAT
ACK
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
A
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
S1DAT
SHIFT BSD7
BSD7
D7
D6
D5
D4
D3
D2
D1
D0
(3)
LOADED BY THE CPU
(1) Valid data in S1DAT
(2) Shifting data in S1DAT and ACK
(3) High level on SDA
SHIFT OUT
SU00970
Figure 39. Shift-in and Shift-out Timing
In the following text, it is assumed that ENS1 = “1”.
STA
,
THE
START F
LAG
STA = “1”: When the STA bit is set to enter a master mode, the SIO1
hardware checks the status of the I2C bus and generates a START
condition if the bus is free. If the bus is not free, then SIO1 waits for
a STOP condition (which will free the bus) and generates a START
condition after a delay of a half clock period of the internal serial
clock generator.
If STA is set while SIO1 is already in a master mode and one or
more bytes are transmitted or received, SIO1 transmits a repeated
START condition. STA may be set at any time. STA may also be set
when SIO1 is an addressed slave.
STA = “0”: When the STA bit is reset, no START condition or
repeated START condition will be generated.
STO
,
THE
STOP F
LAG
STO = “1”: When the STO bit is set while SIO1 is in a master mode,
a STOP condition is transmitted to the I
2
C bus. When the STOP
condition is detected on the bus, the SIO1 hardware clears the STO
flag. In a slave mode, the STO flag may be set to recover from an
error condition. In this case, no STOP condition is transmitted to the
I
2
C bus. However, the SIO1 hardware behaves as if a STOP
condition has been received and switches to the defined “not
addressed” slave receiver mode. The STO flag is automatically
cleared by hardware.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P87C557E8 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8 BIT MICROCONTROLLER |
| P87C557E8EFB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| P87C557E8EFB/01,55 | 功能描述:8位微控制器 -MCU 8B MICROCONTROLLER RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P87C557E8EFB/01,557 | 制造商:NXP Semiconductors 功能描述: |
| P87C575EBA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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