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參數(shù)資料
| 型號： | P83C554SFBD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| 中文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, SOT-314-2, LQFP-64 |
| 文件頁數(shù)： | 47/76頁 |
| 文件大?。?/td> | 400K |
| 代理商： | P83C554SFBD |
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Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I
2
C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
47
Table 8.
Slave Receiver Mode
(Continued)
STATUS
CODE
(S1STA)
STATUS OF THE
I
2
C BUS AND
SIO1 HARDWARE
APPLICATION SOFTWARE RESPONSE
TO/FROM S1DAT
TO S1CON
NEXT ACTION TAKEN BY SIO1 HARDWARE
STA
STO
SI
AA
A0H
A STOP condition or
repeated START
di i
condition has b
received while still
addressed as
SLV/REC or SLV/TRX
No STDAT action or
0
0
0
0
Switched to not addressed SLV mode; no recognition
of own SLA or General call address
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
No STDAT action or
0
0
0
1
No STDAT action or
1
0
0
0
No STDAT action
1
0
0
1
Table 9.
Slave Transmitter Mode
STATUS
CODE
(S1STA)
STATUS OF THE
I
2
C BUS AND
SIO1 HARDWARE
APPLICATION SOFTWARE RESPONSE
TO/FROM S1DAT
TO S1CON
NEXT ACTION TAKEN BY SIO1 HARDWARE
STA
STO
SI
AA
A8H
Own SLA+R has
been received; ACK
has been returned
Load data byte or
X
0
0
0
Last data byte will be transmitted and ACK bit will be
received
Data byte will be transmitted; ACK will be received
load data byte
X
0
0
1
B0H
Arbitration lost in
SLA+R/W as master;
Own SLA+R has
been received, ACK
has been returned
Load data byte or
X
0
0
0
Last data byte will be transmitted and ACK bit will be
received
load data byte
X
0
0
1
Data byte will be transmitted; ACK bit will be received
B8H
Data byte in S1DAT
has been transmitted;
ACK has been
received
Load data byte or
X
0
0
0
Last data byte will be transmitted and ACK bit will be
received
load data byte
X
0
0
1
Data byte will be transmitted; ACK bit will be received
C0H
Data byte in S1DAT
has been transmitted;
NOT ACK has b
received
No S1DAT action or
0
0
0
01
Switched to not addressed SLV mode; no recognition
of own SLA or General call address
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
no S1DAT action or
0
0
0
1
no S1DAT action or
1
0
0
0
no S1DAT action
1
0
0
1
C8H
Last data byte in
S1DAT has been
transmitted (AA
ACK has been
received
0)
No S1DAT action or
0
0
0
0
Switched to not addressed SLV mode; no recognition
of own SLA or General call address
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
no S1DAT action or
0
0
0
1
no S1DAT action or
1
0
0
0
no S1DAT action
1
0
0
1
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