參數(shù)資料
型號(hào)： P83C554SFBD
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
中文描述： 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, SOT-314-2, LQFP-64
文件頁數(shù)： 26/76頁
文件大?。?/td> 400K
代理商： P83C554SFBD
Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I
2
C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
26
(MSB)
(LSB)
AADR2 AADR1
AADR0
7
6
5
4
3
2
1
0
ADCON (C5H)
ADCON.7
ADCON.6
ADCON.5
ADC.1
ADC.0
ADEX
Bit 1 of ADC result
Bit 0 of ADC result
Enable external start of conversion by STADC
0 = Conversion can be started by software only (by setting ADCS)
1 = Conversion can be started by software or externally (by a rising edge on STADC)
ADC interrupt flag: this flag is set when an A/D conversion result is ready to be read. An interrupt is
invoked if it is enabled. The flag may be cleared by the interrupt service routine. While this flag is set,
the ADC cannot start a new conversion. ADCI cannot be set by software.
ADC start and status: setting this bit starts an A/D conversion. It may be set by software or by the
external signal STADC. The ADC logic ensures that this signal is HIGH while the ADC is busy. On
completion of the conversion, ADCS is reset immediately after the interrupt flag has been set. ADCS
cannot be reset by software. A new conversion may not be started while either ADCS or ADCI is high.
Bit
Symbol
Function
ADEX
ADCI ADCS
ADC.1
ADC.0
ADCON.4
ADCI
ADCON.3
ADCS
ADCI
0
0
1
1
ADCS
0
1
0
1
ADC Status
ADC not busy; a conversion can be started
ADC busy; start of a new conversion is blocked
Conversion completed; start of a new conversion requires ADCI=0
Conversion completed; start of a new conversion requires ADCI=0
ADCON.2
ADCON.1
ADCON.0
AADR2
AADR1
AADR0
Analogue input select: this binary coded address selects one of the
eight analogue port bits of P5 to be input to the converter. It can only
be changed when ADCI and ADCS are both LOW.
AADR2
0
0
0
0
1
1
1
AADR1
0
0
1
1
0
0
1
Selected Analog Channel
ADC0 (P5.0)
ADC1 (P5.1)
ADC2 (P5.2)
ADC3 (P5.3)
ADC4 (P5.4)
ADC5 (P5.5)
ADC6 (P5.6)
AADR0
0
1
0
1
0
1
0
If ADCI is cleared by software while ADCS is set at the same time, a new A/D conversion with the
same channel number may be started.
But it is recommended to reset ADCI
before
ADCS is set.
SU01468
Reset Value = xx00 0000B
Figure 23. ADC Control Register (ADCON)
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