參數(shù)資料
型號(hào): P80CE560
廠商: NXP Semiconductors N.V.
元件分類: 8位微控制器
英文描述: 8-BIT SINGLE CHIP MICROCONTROLLERS
中文描述: 8位單晶片微控制器
文件頁(yè)數(shù): 12/84頁(yè)
文件大?。?/td> 441K
代理商: P80CE560
1997 Aug 01
12
Philips Semiconductors
Product specification
8-bit microcontroller
P8xCE560
An access to external Data Memory locations higher than
1791 will be performed with the MOVX @DPTR
instructions in the same way as in the 80C51 structure, so
with P0 and P2 as data/address bus and P3.6 and P3.7 as
write and read timing signals.
Note that the external Data Memory cannot be accessed
with R0 and R1 as address pointer if the AUX-RAM is
enabled (ARD = 0, default).
8.2.4
AUX-RAM P
AGE
R
EGISTER
(XRAMP)
The AUX-RAM Page Register is used to select one of
seven 256-bytes pages of the internal 1792 bytes
AUX-RAM for MOVX-accesses via R0 or R1. Its reset
value is ‘XXXXX000B’.
Table 4
AUX-RAM Page Register (address FAH)
Table 5
Description of XRAMP bits
Table 6
X = don’t care.
Memory locations for all possible MOVX-accesses
Note
1.
ARD: AUX-RAM disable, is a bit in SFR PCON (bit PCON.6); see Section 15.5.
7
6
5
4
3
2
1
0
XRAMPx
XRAMPx
XRAMPx
XRAMPx
XRAMPx
XRAMP2
XRAMP1
XRAMP0
BIT
SYMBOL
FUNCTION
7 to 3
XRAMPx
Reserved for future use. During read XRAMPx = undefined; a write
operation must write logic 0s to these locations.
AUX-RAM page select bits 2 to 0; see Table 6.
2 to 0
XRAMP2 to XRAMP0
ARD
(1)
XRAMP2 XRAMP1 XRAMP0
MEMORY LOCATIONS
MOVX @Ri,A and MOVX A,@Ri instructions access
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
X
AUX-RAM locations 0 to 255 (reset condition)
AUX-RAM locations 256 to 511
AUX-RAM locations 512 to 767
AUX-RAM locations 768 to 1023
AUX-RAM locations 1024 to 1279
AUX-RAM locations 1280 to 1535
AUX-RAM locations 1536 to 1791
No valid memory access; reserved for future use
External RAM locations 0 to 255
MOVX @DPTR,A and MOVX A,@DPTR instructions access
0
X
X
X
AUX-RAM locations 0 to 1791 (reset condition);
External RAM locations 1792 to 65535
External RAM locations 0 to 65535
1
X
X
X
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