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參數(shù)資料
| 型號： | P80C562EFA |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, 16 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 22/52頁 |
| 文件大?。?/td> | 299K |
| 代理商： | P80C562EFA |
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1997 Apr 08
22
Philips Semiconductors
Product specification
8-bit microcontroller
P83C562; P80C562
12.2.4
S
ET
E
NABLE
R
EGISTER
(STE)
Table 20
Set Enable Register (SFR address EEH)
Table 21
Description of STE bits (see notes 1 and 2)
Notes
1.
2.
If STE.n is LOW then P4.n is not affected by a match of CM0 and T2 (n = 0 to 5).
STE.6 and STE.7 are read only.
12.2.5
R
ESET
/T
OGGLE
E
NABLE REGISTER
(RTE)
Table 22
Reset/toggle enable register (SFR address EFH)
Table 23
Description of RTE bits (note 1)
Note
1.
If RTE.n is LOW then P4.n is not affected by a match of CM1 and T2 or CM2 and T2. For more information, refer to
the 8051-based “8-bit Microcontrollers Data Handbook IC20”
7
6
5
4
3
2
1
0
TG47
TG46
SP45
SP44
SP43
SP42
SP41
SP40
BIT
SYMBOL
DESCRIPTION
7
6
5
4
3
2
1
0
TG47
TG46
SP45
SP44
SP43
SP42
SP41
SP40
If HIGH then P4.7 is reset on the next toggle, if LOW P4.7 is set on the next toggle.
If HIGH then P4.6 is reset on the next toggle, if LOW P4.6 is set on the next toggle.
If HIGH the P4.5 is set on a match of CM0 and T2.
If HIGH the P4.4 is set on a match of CM0 and T2.
If HIGH the P4.3 is set on a match of CM0 and T2.
If HIGH the P4.2 is set on a match of CM0 and T2.
If HIGH the P4.1 is set on a match of CM0 and T2.
If HIGH the P4.0 is set on a match of CM0 and T2.
7
6
5
4
3
2
1
0
TP47
TP46
RP45
RP44
RP43
RP42
RP41
RP40
BIT
SYMBOL
DESCRIPTION
7
6
5
4
3
2
1
0
TP47
TP46
RP45
RP44
RP43
RP42
RP41
RP40
If HIGH then P4.7 toggles on a match of CM2 and T2.
If HIGH then P4.6 toggles on a match of CM2 and T2.
If HIGH then P4.5 is reset on a match of CM1 and T2.
If HIGH then P4.4 is reset on a match of CM1 and T2.
If HIGH then P4.3 is reset on a match of CM1 and T2.
If HIGH then P4.2 is reset on a match of CM1 and T2.
If HIGH then P4.1 is reset on a match of CM1 and T2.
If HIGH then P4.0 is reset on a match of CM1 and T2.
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