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Philips Semiconductors
Product specification
P83C557E6/P80C557E6
Single-chip 8-bit microcontroller
1999 Mar 02
12
Table 5.
Special Function Register Memory Map and Reset Values
High Nibble of SFR Address
LOW
8
9
A
B
C
D
E
F
0
P0 %
11111111
P1 %
11111111
P2 %
11111111
P3 %
11111111
P4 %
11111111
PSW %
00000000
ACC %
00000000
B %
00000000
1
SP 00000111
2
DPL
00000000
3
DPH
00000000
4
5
6
ADRSL0 #
XXXXXXXX
ADRSL1 #
XXXXXXXX
ADRSL2 #
XXXXXXXX
ADRSL3 #
XXXXXXXX
ADRSL4 #
XXXXXXXX
ADRSL5 #
XXXXXXXX
ADRSL6 #
XXXXXXXX
ADRSL7 #
XXXXXXXX
7
PCON
00000000
P5 #
XXXXXXXX
ADCON
00000000
ADPSS
00000000
ADRSH #
000000XX
8
TCON %
00000000
S0CON %
00000000
IEN0 %
00000000
IP0 %
X0000000
TM2IR %
00000000
S1CON %
00000000
IEN1 %
00000000
IP1 %
00000000
9
TMOD
00000000
S0BUF
XXXXXXXX
CML0
00000000
CMH0
00000000
S1STA #
11111000
PLLCON
00001101
A
TL0
00000000
CML1
00000000
CMH1
00000000
S1DAT
00000000
TM2CON
00000000
XRAMP
XXXXX000
B
TL1
00000000
CML2
00000000
CMH2
00000000
S1ADR
00000000
CTCON
00000000
C
TH0
00000000
CTL0 #
XXXXXXXX
CTH0 #
XXXXXXXX
TML2 #
00000000
PWM0
00000000
D
TH1
00000000
CTL1 #
XXXXXXXX
CTH1 #
XXXXXXXX
TMH2 #
00000000
PWM1
00000000
E
CTL2 #
XXXXXXXX
CTH2 #
XXXXXXXX
STE
11000000
PWMP
00000000
F
CTL3 #
XXXXXXXX
CTH3 #
XXXXXXXX
RTE
00000000
T3
00000000
%
#
X
=
=
=
Bit addressable register
Read only register
Undefined
6.3
The P8xC557E6 has five methods for addressing:
Register
Direct
Register–Indirect
Immediate
Base–Register plus Index–Register–Indirect
Addressing
The first three methods can be used for addressing destination
operands. Most instructions have a “destination/source” field that
specifies the data type, addressing methods and operands involved.
For operations other than MOVs, the destination operand is also a
source operand.
Access to memory addresses is as follows:
Register in one of the four register banks through Register, Direct
or Register–Indirect addressing
1536 bytes of internal RAM through Direct or Register–Indirect
addressing. Bytes 0–127 of internal RAM may be addressed
directly/indirectly. Bytes 128–255 of internal RAM share their
address location with the SFRs and so may only be addressed
indirectly as data RAM. Bytes 0–1279 of AUX–RAM can only be
addressed indirectly via MOVX.
Special Function Register through direct addressing at address
locations 128–255 (see Figure 8).
External data memory through Register–Indirect addressing
Program memory look–up tables through Base– Register plus
Index–Register–Indirect addressing