參數(shù)資料
型號(hào)： OM4085T
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 顯示驅(qū)動(dòng)器
英文描述： Universal LCD driver for low multiplex rates
中文描述： LIQUID CRYSTAL DISPLAY DRIVER, PDSO40
文件頁(yè)數(shù)： 15/36頁(yè)
文件大?。?/td> 225K
代理商： OM4085T
1997 Feb 25
15
Philips Semiconductors
Product specification
Universal LCD driver for low multiplex
rates
OM4085
Output bank selector
This selects one of the four bits per display RAM address
for transfer to the display latch. The actual bit chosen
depends on the particular LCD drive mode in operation
and on the instant in the multiplex sequence. In 1 : 4
multiplex, all RAM addresses of bit 0 are the first to be
selected, these are followed by the contents of bit 1, bit 2
and then bit 3. Similarly in 1 : 3 multiplex, bits 0, 1 and 2
are selected sequentially. In 1 : 2 multiplex, bits 0 then 1
are selected and, in the static mode, bit 0 is selected.
The OM4085 includes a RAM bank switching feature in the
static and 1 : 2 multiplex drive modes. In the static drive
mode, the BANK SELECT command may request the
contents of bit 2 to be selected for display instead of bit 0
contents. In the 1 : 2 drive mode, the contents of
bits 2 and 3 may be selected instead of bits 0 and 1.
This gives the provision for preparing display information
in an alternative bank and to be able to switch to it once it
is assembled.
Input bank selector
The input bank selector loads display data into the display
RAM according to the selected LCD drive configuration.
Display data can be loaded in bit 2 in static drive mode or
in bits 2 and 3 in 1 : 2 drive mode by using the BANK
SELECT command. The input bank selector functions
independently of the output bank selector.
Blinker
The display blinking capabilities of the OM4085 are very
versatile. The whole display can be blinked at frequencies
selected by the BLINK command. The blinking frequencies
are integer multiples of the clock frequency; the ratios
between the clock and blinking frequencies depend on the
mode in which the device is operating, as shown in
Table 4.
An additional feature is for an arbitrary selection of LCD
segments to be blinked. This applies to the static and 1 : 2
LCD drive modes and can be implemented without any
communication overheads. By means of the output bank
selector, the displayed RAM banks are exchanged with
alternate RAM banks at the blinking frequency. This mode
can also be specified by the BLINK command.
In the 1 : 3 and 1 : 4 multiplex modes, where no alternate
RAM bank is available, groups of LCD segments can be
blinked by selectively changing the display RAM data at
fixed time intervals.
If the entire display is to be blinked at a frequency other
than the nominal blinking frequency, this can be effectively
performed by resetting and setting the display enable bit E
at the required rate using the MODE SET command.
Table 4
Blinking frequencies
BLINKING MODE
NORMAL OPERATING
MODE RATIO
f
CLK
/92160
f
CLK
/184320
f
CLK
/368640
POWER-SAVING
MODE RATIO
f
CLK
/15360
f
CLK
/30720
f
CLK
/61440
NOMINAL BLINKING FREQUENCY
f
blink
(Hz)
blinking off
2
1
0.5
Off
2 Hz
1 Hz
0.5 Hz
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