參數(shù)資料
型號(hào)： NT68P62-01
廠商： Electronic Theatre Controls, Inc.
英文描述： 8-Bit Microcontroller for Monitor (32K OTP ROM Type)
中文描述： 8位微控制器的監(jiān)視器（32K的檢察官辦公室光盤形式）
文件頁(yè)數(shù)： 4/56頁(yè)
文件大?。?/td> 528K
代理商： NT68P62-01
NT68P62-01
4
Pin Description (continued)
Pin No.
40 Pin
42 Pin
Designation
Reset Init.
I/O
Description
16 - 23
17 - 24
P27 – P20
[ DB7 ] – [ DB0]
I/O
[ I/O ]
Bi-directional I/O pin, push-pull structure with high current
drive/sink capability
[ OTP ROM program data buffer ]
24
25
P30/SDA0
[ A12 ]
P30
I/O
[ I ]
Open drain 5V bi-directional I/O pin P30, shared with SDA0
pin of I
2
C bus Schmitt Trigger buffer
[ OTP ROM program address buffer ]
25
26
P31/SCL0
[ A13 ]
P31
I/O
[ I ]
Open drain 5V bi-directional I/O pin P31, shared with SCL0
pin of I
2
c bus Schmitt Trigger buffer
[ OTP ROM program address buffer ]
26
27
P00/DAC7
[ A0 ]
P00
I/O
[ I ]
Bi-directional I/O pin with internal pulled up 22K
register,
shared with open drain 5V D/A converter output 8
[ OTP ROM program address buffer ]
27
28
P01/DAC8
[ A1 ]
P01
I/O
[ I ]
Bi-directional I/O pin with internal pulled up 22K
register,
shared with open drain 5V D/A converter output 9
[ OTP ROM program address buffer ]
28
29
P02/DAC9
[ A2 ]
P02
I/O
[ I ]
Bi-directional I/O pin with internal pulled up 22K
register,
shared with open drain 5V D/A converter output 10
[ OTP ROM program address buffer ]
29
30
P03/DAC10
[ A3 ]
P03
I/O
[ I ]
Bi-directional I/O pin with internal pulled up 22K
register,
shared with open drain 5V D/A converter output 11
[ OTP ROM program address buffer ]
30
31
P04/DAC11
[ A4 ]
P04
I/O
[ I ]
Bi-directional I/O pin with internal pulled up 22K
register,
shared with open drain 5V D/A converter output 12
[ OTP ROM program address buffer ]
31
32
P05/DAC12
[ A5 ]
P05
I/O
[ I ]
Bi-directional I/O pin with internal pulled up 22K
register,
shared with open drain 5V D/A converter output 13
[ OTP ROM program address buffer ]
32
33
P06/VSYNCO
[ A6 ]
P06
I/O
[ I ]
Bi-directional I/O pin with internal pulled up 22K
register,
shared with vsync out
[ OTP ROM program address buffer ]
33
34
P07/HSYNCO
[ A7 ]
P07
I/O
[ I ]
Bi-directional I/O pin with internal pulled up 22K
register,
shared with hsync out
[ OTP ROM program address buffer ]
34
35
CREG
O
On chip voltage regulator output, external regulating
cap.(10μF ~ 100μF) should be connected here
35
36
DAC6
[RESET]
O
[ I ]
Open drain 5V, D/A converter output 6
[ OTP ROM reset ]
36
38
DAC5/SDA1
[ MODE2 ]
O
[ I ]
Open drain 5V, D/A converter output 5, shared with open
drain SDA1 line of I
2
C bus, Schmitt Trigger buffer
[ OTP ROM mode select ]
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