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| 型號： | NSC800E |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| 中文描述： | NSC800TM高性能低功耗CMOS微處理器 |
| 文件頁數(shù)： | 38/76頁 |
| 文件大?。?/td> | 785K |
| 代理商： | NSC800E |
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12.6 8-Bit Arithmetic
(Continued)
7
6
5
4
3
2
1
0
0
0
1
0
1
1
1
1
Timing:
M cyclesD1
T statesD4
Addressing Mode:
Implied
NEG
Negate the Accumulator (2’s complement).
A
w
0
b
A
S: Set if result is negative
Z: Set if result is zero
H: Set according to borrow from
bit 4
P/V: Set only if Accumulator was
X’80 prior to operation
N: Set
C: Set only if Accumulator was not
X’00 prior to operation
0
7
6
5
4
3
2
1
1
1
1
0
1
1
0
1
0
1
0
0
0
1
0
0
Timing:
M cyclesD2
T statesD8 (4, 4)
Addressing Mode:
Implied
CCF
Complement the carry flag.
CY
w
CY
S: N/A
Z: N/A
H: Previous carry
P/V: N/A
N: Reset
C: Complement of previous carry
0
7
6
5
4
3
2
1
0
0
1
1
1
1
1
1
Timing:
M cyclesD1
T statesD4
Addressing Mode:
Implied
SCF
Set the carry flag.
CY
w
1
S: N/A
Z: N/A
H: Reset
P/V: N/A
N: Reset
C: Set
0
7
6
5
4
3
2
1
0
0
1
1
0
1
1
1
Timing:
M cyclesD1
T statesD4
Addressing Mode:
Implied
DAA
Adjust the Accumulator for BCD addition and subtraction
operations. To be executed after BCD data has been oper-
ated upon the standard binary ADD, ADC, INC, SUB, SBC,
DEC or NEG instructions (see ‘‘Register Addressing Arith-
metic’’ table).
DDD
S: Set according to bit 7 of result
Z: Set if result is zero
H: Set according to instructions
P/V: Set according to parity of result
N: N/A
C: Set according to instructions
0
7
6
5
4
3
2
1
0
0
1
0
0
1
1
1
Timing:
M cyclesD1
T statesD4
Addressing Mode:
Implied
IMMEDIATELY ADDRESSED ARITHMETIC
ADD
A, n
Add the immediate data n to the Accumulator.
A
w
A
a
n
S: Set if result is negative
Z: Set if result is zero
H: Set if carry from bit 3
P/V: Set if result exceeds 8-bit 2’s
complement range
N: Reset
C: Set if carry from bit 7
0
7
6
5
4
3
2
1
1
1
0
0
0
1
1
0
n
Timing:
M cyclesD2
T statesD7 (4, 3)
Addressing Mode:
SourceDImmediate
DestinationDImplied
ADC
A, n
Add, with carry, the immediate data n and the Accumulator.
A
w
A
a
n
a
CY
S: Set if result is negative
Z: Set if result is zero
H: Set if carry from bit 3
P/V: Set if result exceeds 8-bit 2’s
complement range
N: Reset
C: Set according to carry from bit
7
38
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NSC800N | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC800V | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC858 | NSC858 Universal Asynchronous Receiver/Transmitter |
| NSC858D | NSC858 Universal Asynchronous Receiver/Transmitter |
| NSC858E | NSC858 Universal Asynchronous Receiver/Transmitter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NSC800E-1/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800E-1M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800E-3/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800E-3M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800E-4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
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