參數(shù)資料
型號(hào): NSC800E
廠商: National Semiconductor Corporation
英文描述: NSC800TM High-Performance Low-Power CMOS Microprocessor
中文描述: NSC800TM高性能低功耗CMOS微處理器
文件頁(yè)數(shù): 37/76頁(yè)
文件大?。?/td> 785K
代理商: NSC800E
12.6 8-Bit Arithmetic
(Continued)
7
6
5
4
3
2
1
0
1
0
1
0
0
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
OR
r
Logically OR the contents of the r register and the Accumu-
lator.
A
w
A
r
S: Set if result is negative
Z: Set if result is zero
H: Reset
P/V: Set if result parity is even
N: Reset
C: Reset
0
7
6
5
4
3
2
1
1
0
1
1
0
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
XOR
r
Logically exclusively OR the contents of the r register with
the Accumulator.
A
w
A
Z
r
S: Set if result is negative
Z: Set if result is zero
H: Reset
P/V: Set if result parity is even
N: Reset
C: Reset
0
7
6
5
4
3
2
1
1
0
1
0
1
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
INC
r
Increment register r.
r
w
r
a
1
S: Set if result is negative
Z: Set if result is zero
H: Set if carry from bit 3
P/V: Set only if r was X’7F before
operation
N: Reset
C: N/A
7
6
5
4
3
2
1
0
0
0
r
1
0
0
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDRegister
CP
r
Compare the contents of register r with the Accumulator
and set the flags accordingly.
A
b
r
S: Set if result is negative
Z: Set if result is zero
H: Set if borrow from bit 4
P/V: Set if result exceeds 8-bit 2’s
complement range
N: Set
C: Set according to borrow
0
7
6
5
4
3
2
1
1
0
1
1
1
r
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDImplied
DEC
r
Decrement the contents of register r.
r
w
r
b
1
S: Set if result is negative
Z: Set if result is zero
H: Set according to a borrow from
bit 4
P/V: Set only if r was X’80 prior to
operation
N: Set
C: N/A
0
7
6
5
4
3
2
1
0
0
r
1
0
1
Timing:
M cyclesD1
T statesD4
Addressing Mode:
SourceDRegister
DestinationDRegister
CPL
Complement the Accumulator (1’s complement).
A
w
A
S: N/A
Z: N/A
H: Set
P/V: N/A
N: Set
C: N/A
37
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