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參數(shù)資料
| 型號： | NM27P040Q170 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | PROM |
| 英文描述： | Inductor; Inductor Type:Standard; Inductance:88uH; Series:CMS; DC Resistance Max:0.01ohm; Package/Case:PCB Surface Mount; Core Material:Ferrite; Current, It rms:3.95A; Leaded Process Compatible:Yes; Leakage Inductance:0.85uH RoHS Compliant: Yes |
| 中文描述： | 512K X 8 UVPROM, 170 ns, CDIP32 |
| 封裝： | WINDOWED, CERAMIC, DIP-32 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 151K |
| 代理商： | NM27P040Q170 |
Programming Characteristics
(Notes 1, 2, 3 & 4)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
AS
Address Setup Time
1
m
s
t
OES
OE Setup Time
1
m
s
t
DS
Data Setup Time
1
m
s
t
VPS
V
PP
Setup Time
1
m
s
t
VCS
V
CC
Setup Time
1
m
s
t
AH
Address Hold Time
0
m
s
t
DH
Data Hold Time
1
m
s
t
DF
Output Enable to Output Float Delay
CE/PGM
e
V
IH
0
60
ns
t
PW
Program Pulse Width
95
100
105
m
s
t
OE
Data Valid from OE
CE/PGM
e
V
IH
100
ns
I
PP
V
PP
Supply Current during
Programming Pulse
CE/PGM
e
V
IL
30
mA
I
CC
V
CC
Supply Current
30
mA
T
A
Temperature Ambient
20
25
30
§
C
V
CC
Power Supply Voltage
6.0
6.25
6.5
V
V
PP
Programming Supply Voltage
12.5
12.75
13.0
V
t
FR
Input Rise, Fall Time
5
ns
V
IL
Input Low Voltage
0.0
0.45
V
V
IH
Input High Voltage
2.4
4.0
V
t
IN
Input Timing Reference Voltage
0.8
2.0
V
t
OUT
Output Timing Reference Voltage
0.8
2.0
V
Note 1:
National’s standard product warranty applies only to devices programmed to specifications described herein.
Note 2:
V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
. The EPROM must not be inserted into or removed from a
board with voltage applied to V
PP
or V
CC
.
Note 3:
The maximum absolute allowable voltage which may be applied to the V
PP
pin during programming is 14V. Care must be taken when switching the V
PP
supply to prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1
m
F capacitor is required across V
PP
, V
CC
to GND to suppress
spurious voltage transients which may damage the device.
Note 4:
Programming and program verify are tested with the fast Progam Algorithm, at typical power supply voltages and timings.
Note 5:
During power up the CE/PGM pin must be brought high (
t
V
IH
) either coincident with or before power is applied to V
PP
.
6
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| NM27P040Q120 | 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM |
| NM27P040QM150 | 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM |
| NM27P040QM200 | 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM |
| NM27P040QXXX | 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NM27P040QE150 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM |
| NM27P040QE170 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM |
| NM27P040QM150 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM |
| NM27P040QM200 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM |
| NM27P040QXXX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM |
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