參數(shù)資料
型號(hào): NM27P512VE120
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: PROM
英文描述: 524,288-Bit (64K x 8) Processor Oriented CMOS EPROM
中文描述: 64K X 8 OTPROM, 120 ns, PQCC32
封裝: PLASTIC, LCC-32
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 176K
代理商: NM27P512VE120
TL/D/11365
N
December 1993
NM27P512
524,288-Bit (64K x 8) Processor Oriented
CMOS EPROM
General Description
The NM27P512 is a 512K Processor Oriented EPROM con-
figured as 64k x 8. It’s designed to simplify microprocessor
interfacing
while
remaining
EPROMs. It can reduce both wait states and glue logic
when the specification improvements are taken advantage
of in the system design. The NM27P512 is implemented in
National’s advanced CMOS EPROM process to provide ex-
cellent reliability and access times as fast as 120 ns.
compatible
with
standard
The interface improvements address two areas to eliminate
the need for additional devices to adapt the EPROM to the
microprocessor and to eliminate wait states at the termina-
tion of the access cycle. Even with these improvements, the
NM27P512 remains compatible with industry standard
JEDEC pinout EPROMs. The maximum specification for out-
put turn-off time has been reduced, eliminating the need for
wait states at the end of a read cycle. Also, the minimum
specification for output hold time has been increased, elimi-
nating the need for external circuitry to hold the data.
Features
Y
Fast output turn off to eliminate wait states
Y
Extended data hold time for microprocessor
compatibility
Y
High performance CMOS
D 120 ns access time
Y
JEDEC standard pin configuration
Y
Manufacturer’s identification code
Block Diagram
TL/D/11365–1
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
NSC800
TM
is a trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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