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參數(shù)資料
| 型號(hào)： | NM27P040QXXX |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM |
| 中文描述： | 4,194,304位（為512k × 8）處理器面向的CMOS存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大?。?/td> | 151K |
| 代理商： | NM27P040QXXX |
TL/D/11367
N
December 1993
NM27P040
4,194,304-Bit (512K x 8) Processor Oriented
CMOS EPROM
General Description
The NM27P040 is a 4096K Processor Oriented EPROM
(POP
TM
) configured as 512K x 8. It’s designed to simplify
microprocessor interfacing while remaining compatible with
standard EPROMs. It can reduce both wait states and glue
logic when the specification improvements are taken advan-
tage of in the system design. The NM27P040 is implement-
ed in National’s advanced CMOS EPROM process to pro-
vide a reliable solution and access times as fast as 120 ns.
The interface improvements address two areas to eliminate
the need for additional devices to adapt the EPROM to the
microprocessor and to eliminate wait states at the termina-
tion of the access cycle. Even with these improvements, the
NM27P040 remains compatible with industry standard
JEDEC pinout EPROMs. The time from CE or OE being
negated until the outputs are guaranteed to be in the high
impedance state has been reduced to eliminate the need
for wait states at the termination of the memory cycle and
the data-out hold time has been extended to eliminate the
need to provide data hold time for the microprocessor by
delaying control signals or latching and holding the data in
external latches.
Features
Y
Fast output turn off to eliminate wait states
Y
Extended data hold time for microprocessor
compatibility
Y
High performance CMOS
D 120 ns access time
Y
JEDEC standard pin configuration
Y
Manufacturer’s identification code
Block Diagram
TL/D/11367–1
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
POP
TM
is a trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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