參數(shù)資料
型號: NDS9925A
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: Dual N-Channel Enhancement Mode Field Effect Transistor(4.5A,20V,0.06Ω)(雙N溝道增強型場效應管(漏電流4.5A, 漏源電壓20V,導通電阻0.06Ω))
中文描述: 4.5 A, 20 V, 0.06 ohm, 2 CHANNEL, N-CHANNEL, Si, POWER, MOSFET
封裝: SOIC-8
文件頁數(shù): 2/6頁
文件大小: 194K
代理商: NDS9925A
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
I
DSS
I
GSSF
I
GSSR
ON CHARACTERISTICS
(Note 2)
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 μA
V
DS
= 16 V, V
GS
= 0 V
V
GS
= 8 V, V
DS
= 0 V
V
GS
= -8 V, V
DS
= 0 V
20
V
Zero Gate Voltage Drain Current
1
μA
Gate - Body Leakage, Forward
100
nA
Gate - Body Leakage, Reverse
-100
nA
V
GS(th)
R
DS(ON)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= 4.5 V, I
D
= 4.5 A
V
GS
= 2.7 V, I
D
= 4 A
V
GS
= 4.5 V, V
DS
= 5 V
0.4
1
V
Static Drain-Source On-Resistance
0.06
0.075
I
D(on)
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
On-State Drain Current
15
A
I
S
V
SD
Maximum Continuous Drain-Source Diode Forward Current
1.3
A
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 1.3 A
(Note 2)
1.2
V
Notes :
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is
guaranteed by design while R
θ
CA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
NDS9925A Rev. A
c. 135
O
C/W on a 0.003 in
2
pad of 2oz copper.
b. 125
O
C/W on a 0.02 in
2
pad of 2oz copper.
a. 78
O
C/W on a 0.5 in
2
pad of 2oz copper.
相關(guān)PDF資料
PDF描述
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參數(shù)描述
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