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參數(shù)資料
| 型號： | NDC7001 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Dual N & P-Channel Enhancement Mode Field Effect Transistor |
| 中文描述： | 雙N |
| 文件頁數(shù)： | 3/13頁 |
| 文件大?。?/td> | 284K |
| 代理商： | NDC7001 |
Electrical Characteristics
(T
A
= 25
o
C unless otherwise noted)
Symbol
Parameters
Conditions
Type
Min
Typ
Max
Units
SWITCHING CHARACTERISTICS
(Note 2)
t
D(on)
Turn - On Delay Time
N-Channel
V
DD
= 25 V, I
D
= 0.25 A,
V
GS
= 10 V, R
GEN
= 25
P-Channel
V
DD
= -25 V, I
D
= -0.25 A,
V
GS
= -10 V, R
GEN
= 25
N-Ch
6
20
nS
P-Ch
14
20
t
r
Turn - On Rise Time
N-Ch
6
20
P-Ch
6
20
t
D(off)
Turn - Off Delay Time
N-Ch
11
20
P-Ch
13
20
t
f
Turn - Off Fall Time
N-Ch
5
20
P-Ch
6
20
Q
g
Total Gate Charge
N-Channel
V
= 25 V,
I
D
= 0.51 A, V
GS
= 10 V
P-Channel
V
= -25 V,
I
D
= -0.34 A, V
GS
= -10 V
N-Ch
1
nC
P-Ch
1.3
Q
gs
Gate-Source Charge
N-Ch
0.19
nC
P-Ch
0.23
Q
gd
Gate-Drain Charge
N-Ch
0.33
nC
P-Ch
0.38
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
Maximum Continuous Source Current
N-Ch
0.51
A
P-Ch
-0.34
I
SM
Maximum Pulse Source Current
(Note 2)
N-Ch
1.5
A
P-Ch
-1
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 0.51 A
(Note 2)
V
GS
= 0 V, I
S
= -0.34 A
(Note 2)
N-Ch
0.8
1.2
V
P-Ch
-0.8
-1.2
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
P
D
(
t
) =
T
J
T
A
R
θ
JA
(
t
)
=
T
J
T
A
R
θ
JC
+
R
θ
CA
(
t
)
=
I
D
2
(
t
) ×
R
DS
(
ON
)
T
J
Typical R
θ
JA
for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 130
o
C/W when mounted on a 0.125 in
2
pad of 2oz cpper.
b. 140
o
C/W when mounted on a 0.005 in
2
pad of 2oz cpper.
c. 180
o
C/W when mounted on a 0.0015 in
2
pad of 2oz cpper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
NDC7001C.SAM
1a
1b
1c
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| NDC7001C | Dual N & P-Channel Enhancement Mode Field Effect Transistor |
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| NDC | ISOLATED RESISTOR NETWORK |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NDC7001C | 功能描述:MOSFET Dual N/P Channel FET Enhancement Mode RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| NDC7001C | 制造商:Fairchild Semiconductor Corporation 功能描述:MOSFET DUAL NP SUPERSOT-6 |
| NDC7001C | 制造商:Fairchild Semiconductor Corporation 功能描述:50V COMP N/P 2/5 O SSOT6 |
| NDC7001C_Q | 功能描述:MOSFET Dual N/P Channel FET Enhancement Mode RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| NDC7002 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Dual N-Channel Enhancement Mode Field Effect Transistor |
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