參數(shù)資料
型號(hào)： NCN6004AFTBR2
廠商： ON SEMICONDUCTOR
元件分類： 其它接口
英文描述： Dual SAM/SIM Interface Integrated Circuit
中文描述： SPECIALTY INTERFACE CIRCUIT, PQFP48
封裝： PLASTIC, TQFP-48
文件頁數(shù)： 8/40頁
文件大?。?/td> 329K
代理商： NCN6004AFTBR2
NCN6004A
http://onsemi.com
8
PIN DESCRIPTION
(continued)
Pin
Description
Type
Symbol
37
CRD_IO_B
INPUT/OUTPUT
This pin carries the data serial connection between the external smart card #B and
the microcontroller. A built-in bi-directional level shifter is used to adapt the card
and the MCU, regardless of the power supply voltage of each signals.
This pin is biased by a pull up resistor connected to CRD_VCC_A. When CS = High,
the CRD_IO_A holds the previous I/O logic state and resume to a normal operation
when this pin is reactivated.
The pin is hardwired to zero, the bias being provided by the V
CC
supply, when either
the V
CC
voltage drops below 2.7 V, or during the CRD_VCC_B start-up time.
38
CRD_RST_B
OUTPUT
This pin is connected to the external smart card #B to support the RESET signal. A
built-in level shifter is used to adapt the card and the MCU, regardless of the power
supply voltage of each signals.
The signal present at this pin is latched upon either CARD_SEL or CS or PGM posi-
tive going transient and resume to a transparent mode when card #B is selected.
The pin is hardwired to zero, the bias being provided by the V
CC
supply, when either
the V
CC
voltage drops below 2.7 V, or during the CRD_VCC_B start-up time.
39
CRD_C4_B
OUTPUT
This pin controls the card #B C4 contact, according to the ISO specification. A built-
in level shifter is used to adapt the card and the MCU, regardless of the power sup-
ply voltage of each signals. The signal present at this pin is latched upon either
CARD_SEL or CS or PGM
positive going transient and resume to a transparent
mode when card #B is selected.
The pin is hardwired to zero, the bias being provided by the V
supply, when either
the V
CC
voltage drops below 2.7 V, or during the CRD_VCC_B start-up time.
40
CRD_C8_B
OUTPUT
This pin controls the card #B C8 contact, according to the ISO specification. A built-
in level shifter is used to adapt the card and the MCU, regardless of the power sup-
ply voltage of each signals. The signal present at this pin is latched upon either
CARD_SEL or CS or PGM positive going transient and resume to a transparent
mode when card #B is selected.
The pin is hardwired to zero, the bias being provided by the V
CC
supply, when either
the V
CC
voltage drops below 2.7 V, or during the CRD_VCC_B start-up time.
41
CRD_DET_B
INPUT
This pin senses the signal coming from the external smart card connector to detect
the presence of card #B. The polarity of the signal is programmable as Normally
Open or Normally Close switch. The logic signal will be activated when the level is
either Low or High, with respect to the polarity defined previously. By default, the
input is Normally Open. A built-in circuit prevents uncontrolled short pulses to gen-
erate an INT signal. The digital filter eliminates pulse width below 50 s.
42
ANLG_VCC
POWER
This pin is connected to the positive external power supply. The device sustains any
voltage from +2.7 V to +5.5 V. This voltage supplies the NCN6004A internal Analog
and Logic circuits. A high quality capacitor must be connected across this pin and
ANLG_GND, 10 F/6 V is recommended. A set of extra pins (28 and 33) are pro-
vided to connect the power supply to the internal DC/DC converter.
Note: The voltage present at pin 28 and 33 must be equal to the voltage present at
pin 42
43
ANLG_GND
GROUND
This pin is the ground reference for both analog and digital signals and must be con-
nected to the system Ground. Care must be observed to provide a copper PCB lay-
out designed to avoid small signals and power transients sharing the same track.
Good high frequency techniques are strongly recommended.
44
MUX_MODE
INPUT
This pin selects the mode of operation of the card signals from the MPU side. When
MUX_MODE = Low, all the card signals are fully de-multiplexed and data transfers
can take place with both cards simultaneously. On top of that, both cards can be
accessed during the programming sequence, assuming the external microcontroller
is capable to run multi tasks software.
When MUX_MODE = High, all the card signals are multiplexed and the communica-
tions with the cards shall take place in a sequential mode. The card is selected by
setting CARD_SEL high or Low. The internal logic will disable the CARD_B inputs
and use CARD_SEL inputs as a single channel to controls both output smart cards
sequentially when MUX_MODE = H.
Moreover, when MUX_MODE = High, all the B channel P dedicated pins, except
CLOCK_IN_B, pin 15, are forced to a high level by means of internal pull up resis-
tors. It is not necessary to connect these pins (16, 17, 18 and 19) to an external bias
voltage, but it is mandatory to avoid any connections to ground. On the other hand,
in this case the internal pull up resistor connected across I/O_A, pin 9 and V
CC
is
automatically disconnected to avoid a current overload on the I/O line.
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