參數(shù)資料
型號: MX805J
英文描述: RF/Baseband Circuit
中文描述: 射頻/基帶電路
文件頁數(shù): 6/24頁
文件大?。?/td> 532K
代理商: MX805J
Sub-Audio Signaling Processor
Pin
Signal
21
Comparator Out
Page 6 of 24
MX805A
2001 MX-COM, Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
All trademarks and service marks are held by their respective companies.
Doc. # 20480116.005
Description
This is the output of the ‘comparator’ amplifier. This node is also connected
internally to the input of the /digital Noise Filter (See Figure 1). When both
decoders (CTCSS or NRZ) are powersaved, this output is at a logic ‘0’.
External RC components connected to this pin form the timing mechanism of a
Notone period timer. The external network determines the “charge rate” of the
timer to V
BIAS
. The expiration of the timer will cause an interrupt. This function is
only used in the CTCSS RX mode. See page 9.
This ‘real time’ input can be used to reactivate the MX805A from the ‘Powersave
All’ condition using an externally derived signal. The MX805A will be in
‘Powersave All’ condition when both this pin and bit 0 of the Control Register are
set to a logic ‘1’. Recovery from ‘Powersave All’ is achieved by putting either the
Wake
pin or the ‘Powersave All” bit at logic ‘0’. This allows MX805A activation by
the microcontroller or an external signal, such as RSSI or Carrier Detect.
Positive Supply. A single 5.0V regulated supply is required.
Note: More information on external components and the DBS800 system integration of the MX805A are
contained in the DBS800 System Support Documentation. Guidance on the generation and
manipulation of NRZ and RX and TX data is given in the DBS800 Application support documentation.
C-BUS: This is MX-COM’s proprietary standard for the transmission of commands and data between a
microcontroller and DBS8000 microcircuits. It may be used with any microcontroller, and can, if
desired, take advantage of the hardware and serial I/O functions embodied into many types of
microcontroller. The C-BUS data rate is determined by the microcontroller.
Table 1: Signal List
22
Notone Timing
23
Wake
24
V
DD
RX CTCSS Tone Measurement Completed
CTCSS NOTONE Timer Expired
1 NRZ RX Data Byte Received
New NRZ Data Received Before Last Byte Read
NRZ TX Buffer Ready
NRZ Data Transmission Complete
Table 2: Interrupt Conditions
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