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參數(shù)資料
| 型號(hào)： | MX805J |
| 英文描述： | RF/Baseband Circuit |
| 中文描述： | 射頻/基帶電路 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大?。?/td> | 532K |
| 代理商： | MX805J |
Sub-Audio Signaling Processor
5.2.4.1.1 The Integer (N) –Byte 1
The binary number representing twice the number of complete input sub-audio cycle periods counted during
the measurement period of 122.64ms (4.0MHz crystal)
5.2.4.1.2 The Remainder (R) –Byte 0
A binary number representing the remainder part, R, of 2x the Sub-Audio Input Frequency. R = number of
specified measuring-clock cycles required to complete the specified measurement period (See N). The clock
cycle frequency is 4166.6Hz (4.0MHz crystal)
Page 14 of 24
MX805A
2001 MX-COM, Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
All trademarks and service marks are held by their respective companies.
Doc. # 20480116.005
15
14
13
12
11
10
9
8
"0"
"0"
Integer (N)
7
6
5
4
3
2
1
0
"0"
"0"
Remainder (R)
Byte 1
Byte 0
CTCSS RX Frequency Register
(Reply Data)
(LSB) - Tra(Reply Data)
Figure 6: Format of the CTCSS RX Frequency Register
5.2.4.2
The format of the CTCSS RX Frequency Register is shown in Figure 6.
Bits 8 (LSB) to 13 (MSB) are used to represent the Integer (N). From Byte 1, valid values of
61
N
16
N
≤
≤
=
i.e. values of N less than 16 and greater than 61 are not within the specified frequency band.
CTCSS RX Frequency Register
Bits 0 (LSB) to 5 (MSB) are used to represent the Remainder (R). From Byte 0, valid values of
register is not affected by the General Reset command (01H) and may adopt any random configuration at
Power-UP.
5.2.4.3
CTCSS RX Frequency Measurement Formulas
To assist in the production of “l(fā)ookup” tables and limit-values in the microcontroller, and to provide guidance
upon the determination of N and R from a measured CTCSS frequency, the following formulas show the
derivation of the CTCSS RX Frequency (f
CTCSS
IN
) from the measured data bytes (N and R).
5.2.4.3.1 f
CTCSS
IN
In the measurement period of 122.64ms there are N cycles at 2 x f
CTCSS
IN
and R clcok cycles at 4166.6Hz,
for any input frequency.
×
=
1920
31
R
≤
. This
+
=
=
×
5
f
x
1920
f
x
N
-
511
INT
R
f
xf
511
x
1920
INT
N
R)
-
(511
f
N
f
IN
CTCSS
XTAL
XTAL
IN
CTCSS
XTAL
IN
CTCSS
Calculate N first
Example: (f
XTAL
= 4.00Mhz): f
CTCSS
IN
= 100Hz N = 24 R = 11; f
CTCSS
IN
= 250Hz N = 61 R = 3
5.2.4.4
NoTone Timing
The input sub-audio signal is monitored by the Frequency Assessment Circuitry. Before any NoTone action is
enabled, the MX805A must have achieved at least one successful “Tone Measurement Complete” action.
If there is no signal or the signal is of a consistently poor quality, the NoTone timer will start to charge via the
timing components. When the timing period has expired (at V
DD
/2), an Interrupt and a Status bit (NoTone
Timer Expired) are generated. This is a one-shot function which is rest by a “Tone Measurement Complete”
interrupt.
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| MX805LH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RF/Baseband Circuit |
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| MX806ADW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Audio Processor |
| MX806AJ | 制造商:CMLMICRO 制造商全稱:CML Microcircuits 功能描述:Audio Processor |
| MX806ALH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Audio Processor |
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