COMMUNICATION SEMICONDUCTORS
MX805A
Sub-Audio Signaling
DATA BULLETIN
Processor
2001 MX-COM, Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
All trademarks and service marks are held by their respective companies.
Doc. # 20480116.005
Features
Non-predictive CTCSS Tone Decoder
DCS Sub-Audio Signal demodulator
CTCSS /NRZ Encoder with TX level
adjustment and lowpass filter output
stage with optional NRZ pre-emphasis
Selectable Sub-Audio bandstop filter
NoTone (CTCSS RX) period timer
Low Power Operation
Member of DBS800 Family (C-BUS
Compatible)
RX SIN
RX LPF
RX AMP
AMP IN
AMP OUT
RX SUB-AUDIO
OUT
COMAMP
COMPARATOR
IN
DNRZ RX
+
+
_
_
NOISE
FILTER
FREQUENCY
TIMER
MFREQUENCY
INC-BUS
AND
CLOGIC
TADJUST
NOTONE
COMMAND DATA
REPLY DATA
INTERRUPT
SERIAL CLOCK
WAKE
ADDRESS SELECT
TX SOUT
TX SUB-AUDIO LPF
AUDIO OUT
AUDIO BYPASS
GCLOCK
AUDIO IN
XTAL/
XTAL
OUT
V
DD
V
BIAS
V
SS
TNRZ
NRZ RX
RX NRZ
AUCTCSS SUB-
CHIP SELECT
RAW NRZ DATA
RX
TX
SUB-AUDIO BANDSTOP
AUDIO SIGNAL PATH
VARIABLE
180Hz/260Hz
DATAAND
SHIFT REGISTER
The MX805A is a sub-audio frequency signaling processor that provides outband audio and digital signaling
capability for LMR systems. Designed for the transmission and non-predictive reception of Continuous Tone
Controlled Squelch (CTCSS) tones and other non-standard frequencies, the MX805A also handles Non-
Return-to Zero (NRZ) data reception and transmission to provide Digitally Coded Squelch (DCS/DPL
) and
LTR
signaling.
Setting the MX805A functions and modes is accomplished by data loaded from the microcontroller to the
controlling registers within the device. Reply Data and Interrupt protocol keep the microcontroller up to date
on the operational status of the circuitry. CTCSS tone data for transmission is generated in the
microcontroller, loaded to the CTCSS TX Frequency Register, encoded and output as a tone via the TX Sub-
audio LPF. Received non-predicted CTCSS tone frequencies are measured and the resulting data, in the
form of a 2-byte data word, is presented to the microcontroller for matching against a lookup table. Noise
filtering is provided to improve the signal quality prior to measurement. NRZ coded data streams for
transmission, when generated within a microcontroller, are loaded to the NRZ TX Data Buffer and output, in
8-bit bytes, through the lowpass filter circuitry as subaudible signals. DCS turnoff tones can be added to the
data signals by switching the MX805A to the CTCSS transmit mode at the appropriate time. NRZ coding is
produced by the microcontroller and translated to subaudio signals by the MX805A. Received NRZ data is
filtered, detected, and placed into the NRZ Data Register, which is then available for transfer (one byte at a
time) to the microcontroller for decoding by software. Clock extraction circuitry is provided on-chip. TX ad RX
baud rates are selectable.
Hardware and software are designed to allow consecutive addressing of two MX805A Sub-Audio Signaling
Processors to achieve multi-mode duplex operation. Powersaving may be controlled by software or by an
input dedicated to the purpose.
The MX805A may be used with a 5.0V power supply and is available in the following packages:
24-pin SOIC (MX805ADW), 24-pin PLCC (MX805ALH), and 24-pin PDIP (MX805AP).