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參數(shù)資料
| 型號： | MX805LH |
| 英文描述： | RF/Baseband Circuit |
| 中文描述： | 射頻/基帶電路 |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 532K |
| 代理商： | MX805LH |
Sub-Audio Signaling Processor
5.2.1
Write to Control Register - A/C 70H (78H) followed by 1 byte of Command Data
Table 6 shows the configurations available to the MX805A. Bits 5, 6, and 7 are used together to Enable and
Powersave circuits sections as required.
Setting
Transmitted First
7
6
5
Enabled
0
0
0
0
1
1
1
1
1
1
NRZ Decoder
Page 12 of 24
MX805A
2001 MX-COM, Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
All trademarks and service marks are held by their respective companies.
Doc. # 20480116.005
Control Bits
Powersaved
NRZ Decoder and Both Encoders
CTCSS Decoder and Both Encoders
All Decoders
All Decoders
NRZ Encoder and Decoder
No circuits
All Encoders
All Encodes except Tx Sub-Audio LPF
and CTCSS Decoder
MSB
0
0
1
1
0
0
1
0
1
0
1
0
1
0
CTCSS Decoder
NRZ Decoder
CTCSS Encoder
NRZ Encoder
CTCSS Encoder and Decoder
NRZ Encoder and CTCSS Decoder
NRZ Decoder and CTCSS Decoder
4
1
0
3
1
0
2
1
0
1
1
0
0
1
0
Enable Audio Output – Used with Bit 3
Disable Audio Output – output to V
BIAS
Enable Sub-Audio Bandstop Filter (Audio Signal Path)
Bypass Sub-Audio Bandstop Filter
Enable All MX805A Interrupts
Disable All MX805A Interrupts
Set Rx Lowpass Filter Bandwidth to 180Hz – for low CTCSS tones or NRZ Data
Set Rx Lowpass Filter Bandwidth to 260Hz
All encoders and Decoders Powersaved
All Encoders and Decoders Enabled unless individually Powersaved
Table 6: Control Register
5.2.2
Upon power-up the bits in the MX805A registers will be random (either 0 or 1). A General Reset Command
(01
H
) will be required to reset all devices on the C-BUS. It has the following effect on the MX805A:
Control Register
Status Register
NoTone Timer
Warning
: The following MX805A register configurations are not affected by a General Rest Command:
CTCSS Rx Frequency
CTCSS Tx Frequency/NRZ Baud Rate Register
NRZ Rx Data Register
NRZ Tx Data Register
Gain Set Register
Note
: Setting the Control Register in this way will set the MX805A to the CTCSS decode mode and overwrite
a “Powersave All” instruction. It should also be considered that a General Reset command will reset All
DBS800 ICs operating on the C-BUS.
General Reset
Set to 00
H
Set to 00
H
Discharged
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相關(guān)代理商/技術(shù)參數(shù) |
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| MX806A | 制造商:CMLMICRO 制造商全稱:CML Microcircuits 功能描述:Audio Processor |
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| MX806AJ | 制造商:CMLMICRO 制造商全稱:CML Microcircuits 功能描述:Audio Processor |
| MX806ALH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Audio Processor |
| MX806J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Audio Processor |
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