參數(shù)資料
型號(hào): MTV230M64
廠商: Electronic Theatre Controls, Inc.
英文描述: 8051 Embedded Micro Controller with Flash OSD and ISP
中文描述: 8051嵌入式閃存OSD和ISP的微控制器
文件頁(yè)數(shù): 16/31頁(yè)
文件大?。?/td> 404K
代理商: MTV230M64
MTV230M64
Page 16 of 31
= 4
= 5
= 6
= 7
overflow interval = 4 x 0.25 sec.
overflow interval = 5 x 0.25 sec.
overflow interval = 6 x 0.25 sec.
overflow interval = 7 x 0.25 sec.
ADC
(w) :
ADC control.
ENADC
SADC0
SADC1
SADC2
SADC3
= 1
= 1
= 1
= 1
= 1
Enable ADC.
Select ADC0 pin input.
Select ADC1 pin input.
Select ADC2 pin input.
Select ADC3 pin input.
ADC
(r) :
ADC convert result.
10. In System Programming function (ISP)
The two Flash memories (OSD Flash and Code Flash) can be programmed by a specific WRITER in parallel
mode, or by IIC Host in serial mode while the system is working. The ISP’s feature is outlined as below:
1. Single 3.3V power supply for Program/Erase/Verify.
2. Block Erase: 512 Byte for Program Code or 256 words for OSD fonts, both are 10mS time
3. Whole Flash erase (Blank): 10mS
4. Byte/Word programming Cycle time: 60uS per byte, 120uS per word
5. Read access time: 40ns
6. Only two pin IIC bus(shared with DDC2) is needed for ISP in user/factory mode
7. IIC Bus clock rate up to 140KHz
8. Whole 64K-byte/9K-word Flash programming within 6/2 Sec
9. CRC check provide 100% coverage for all single/double bit errors
After power on/Reset, The MTV230M64 is running the original Program Code. Once the S/W detect a ISP
request (by key or IIC), S/W can accept the request by the steps below:
1. Clear watchdog to prevent reset during ISP period
2. Disable all interrupt to prevent CPU wake-up
3. Write ISP slave’s IIC address to ISPSLV for communication
4. Write 93h to ISP enable register (ISPEN) to enable ISP
5. Enter 8051 idle mode
When ISP is enable, the MTV230M64 will disable Watchdog reset and switch the Flash interface to ISP host in
15-22.5uS. So S/W MUST enter idle mode immediately after enable ISP. In the 8051 idle mode, PWM DACs
and I/O pins keep running at its old status. There are 4 types of IIC bus transfer protocol in ISP mode.
Command Write
S-tttttt10k-cccccxxBk-AAAAAAAAk-P
Command Read
S-tttttt11k-cccccXXBK-AAAAAAAAK-aaaaaaaaK-RRRRRRRRK-rrrrrrrrK-P
Data Write
S-tttttt00k-aaaaaaaak-ddddddddk-ddddddddk- ... –ddddddddk-ddddddddk-P
Data Read
S-tttttt00k-aaaaaaaak-(P)-
S-tttttt01k-ddddddddK-ddddddddK- ... –ddddddddK-ddddddddK-P
where
S = start or re-start
K = ack by host (0 or 1)
tttttt = ISP slave address
B = OSD/Code select (1=OSD)
P = stop
k = ack by slave
ccccc = command
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