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參數(shù)資料
| 型號(hào)： | MTSF3N02HDR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | 小信號(hào)晶體管 |
| 英文描述： | 4000 mA, 20 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封裝： | MICROPAK-8 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大?。?/td> | 137K |
| 代理商： | MTSF3N02HDR2 |
MTSF3N02HD
http://onsemi.com
7
I S
,SOURCE
CURRENT
t, TIME
Figure 13. Reverse Recovery Time (trr)
di/dt = 300 A/s
Standard Cell Density
High Cell Density
tb
trr
ta
trr
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define the
maximum simultaneous drain–to–source voltage and drain
current that a transistor can handle safely when it is forward
biased. Curves are based upon maximum peak junction
temperature and a case temperature (TC) of 25°C. Peak
repetitive pulsed power limits are determined by using the
thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance – General
Data and Its Use.”
Switching between the off–state and the on–state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded, and that the
transition time (tr, tf) does not exceed 10 s. In addition
the total power averaged over a complete switching cycle
must not exceed (TJ(MAX) – TC)/(R
θJC).
Figure 14. Maximum Rated Forward Biased
Safe Operating Area
0.1
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
1
10
I D
,DRAIN
CURRENT
(AMPS)
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.01
VGS = 8 V
SINGLE PULSE
TC = 25°C
10
0.1
dc
10 ms
1
100
1 ms
100 s
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