參數(shù)資料
型號(hào): MTP15N06V
廠商: MOTOROLA INC
元件分類: JFETs
英文描述: TMOS POWER FET 15 AMPERES 60 VOLTS RDS(on) = 0.12 OHM
中文描述: 15 A, 60 V, 0.12 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB
文件頁數(shù): 1/8頁
文件大?。?/td> 163K
代理商: MTP15N06V
1
Motorola, Inc. 1996
N–Channel Enhancement–Mode Silicon Gate
TMOS V is a new technology designed to achieve an on–resis-
tance area product about one–half that of standard MOSFETs. This
new technology more than doubles the present cell density of our
50 and 60 volt TMOS devices. Just as with our TMOS E–FET
designs, TMOS V is designed to withstand high energy in the
avalanche and commutation modes. Designed for low voltage, high
speed switching applications in power supplies, converters and
power motor controls, these devices are particularly well suited for
bridge circuits where diode speed and commutating safe operating
areas are critical and offer additional safety margin against
unexpected voltage transients.
New Features of TMOS V
On–resistance Area Product about One–half that of Standard
MOSFETs with New Low Voltage, Low RDS(on) Technology
Faster Switching than E–FET Predecessors
Features Common to TMOS V and TMOS E–FETS
Avalanche Energy Specified
IDSS and VDS(on) Specified at Elevated Temperature
Static Parameters are the Same for both TMOS V and
TMOS E–FET
MAXIMUM RATINGS
(TC = 25
°
C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–Source Voltage
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
60
Vdc
Drain–Gate Voltage (RGS = 1.0 M
)
Gate–Source Voltage — Continuous
Gate–Source Voltage
— Single Pulse (tp
50
μ
s)
Drain Current — Continuous @ 25
°
C
Drain Current
— Continuous @ 100
°
C
Drain Current
— Single Pulse (tp
10
μ
s)
Total Power Dissipation @ 25
°
C
Derate above 25
°
C
60
Vdc
±
20
±
25
Vdc
Vpk
15
8.7
45
Adc
Apk
55
0.5
Watts
W/
°
C
Operating and Storage Temperature Range
TJ, Tstg
EAS
–55 to 175
°
C
mJ
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25
°
C
(VDD = 25 Vdc, VGS = 10 Vdc, IL = 15 Apk, L = 1.0 mH, RG = 25
)
Thermal Resistance — Junction to Case
Thermal Resistance
— Junction to Ambient
113
R
θ
JC
R
θ
JA
TL
2.73
62.5
°
C/W
Maximum Lead Temperature for Soldering Purposes, 1/8
from case for 10 seconds
260
°
C
Designer’s Data for “Worst Case” Conditions
— The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET, Designer’s and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred
devices are Motorola recommended choices for future use and best overall value.
REV 2
Order this document
by MTP15N06V
SEMICONDUCTOR TECHNICAL DATA
TM
D
S
G
TMOS POWER FET
15 AMPERES
60 VOLTS
RDS(on) = 0.12 OHM
Motorola Preferred Device
CASE 221A–06, Style 5
TO–220AB
相關(guān)PDF資料
PDF描述
MTV32N20E TMOS POWER FET 32 AMPERES 200 VOLTS RDS(on) = 0.075 OHM
MTW16N40E TMOS POWER FET 16 AMPERES 400 VOLTS RDS(on) = 0.24 OHM
MTW20N50E TMOS POWER FET 20 AMPERES 500 VOLTS RDS(on) = 0.24 OHM
MTW23N25E TMOS POWER FET 23 AMPERES 250 VOLTS RDS(on) = 0.11 OHM
MTW24N40E TMOS POWER FET 24 AMPERES 400 VOLTS RDS(on) = 0.16 OHM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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