參數(shù)資料
型號： MTD2955V
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： JFETs
英文描述： P-Channel Enhancement Mode Field Effect Transistor
中文描述： 12 A, 60 V, 0.23 ohm, P-CHANNEL, Si, POWER, MOSFET, TO-252
封裝： DPAK-3
文件頁數(shù)： 2/10頁
文件大小： 148K
代理商： MTD2955V
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS
(TJ = 25
°
C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 0.25 mAdc)
Temperature Coefficient (Positive)
(Cpk
≥
2.0) (3)
V(BR)DSS
60
—
—
58
—
—
Vdc
mV/
°
C
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150
°
C)
Gate–Body Leakage Current (VGS =
±
15 Vdc, VDS = 0 Vdc)
IDSS
—
—
—
—
10
100
μ
Adc
IGSS
—
—
100
nAdc
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250
μ
Adc)
Threshold Temperature Coefficient (Negative)
(Cpk
≥
2.0) (3)
VGS(th)
2.0
—
2.8
5.0
4.0
—
Vdc
mV/
°
C
Static Drain–to–Source On–Resistance
(VGS = 10 Vdc, ID = 6.0 Adc)
(Cpk
≥
1.5) (3)
RDS(on)
—
0.185
0.230
Ohm
Drain–to–Source On–Voltage
(VGS = 10 Vdc, ID = 12 Adc)
(VGS = 10 Vdc, ID = 6.0 Adc, TJ = 150
°
C)
VDS(on)
—
—
—
—
2.9
2.5
Vdc
Forward Transconductance (VDS = 10 Vdc, ID = 6.0 Adc)
gFS
3.0
5.0
—
mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
25 Vdc V
Ciss
Coss
—
550
770
pF
Output Capacitance
—
200
280
Reverse Transfer Capacitance
Crss
—
50
100
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
(VDD = 30 Vd
VGS= 10 Vdc
VGS = 10 Vdc,
RG = 9.1
I
12 Ad
td(on)
tr
td(off)
tf
QT
Q1
Q2
Q3
—
15
30
ns
Rise Time
—
50
100
Turn–Off Delay Time
—
24
50
Fall Time
)
—
39
80
Gate Charge
(VDS = 48 Vdc,D
(DS
VGS = 10 Vdc)
—
19
30
nC
—
4.0
—
,
—
9.0
—
—
7.0
—
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
(IS = 12 Adc, VGS = 0 Vdc)
(IS = 12 Adc, VGS = 0 Vdc, TJ = 150
°
C)
VSD
—
—
1.8
1.5
3.0
—
Vdc
Reverse Recovery Time
(IS = 12 Adc, VGS
(S
dIS/dt = 100 A/
μ
s)
trr
ta
tb
—
115
—
ns
—
90
—
,
—
25
—
Reverse Recovery Stored Charge
QRR
—
0.53
—
μ
C
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25
″
from package to center of die)
LD
—
—
3.5
4.5
—
—
nH
Internal Source Inductance
(Measured from the source lead 0.25
″
from package to source bond pad)
LS
—
7.5
—
nH
(1) Pulse Test: Pulse Width
≤
300
μ
s, Duty Cycle
≤
2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) Reflects typical values. Cpk =
3 x SIGMA
Max limit – Typ
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