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參數(shù)資料
| 型號(hào)： | MTC20154 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | INTEGRATED ADSL CMOS ANALOG FRONT-END CIRCUIT |
| 中文描述： | 集成ADSL CMOS模擬前端電路 |
| 文件頁數(shù)： | 17/21頁 |
| 文件大?。?/td> | 533K |
| 代理商： | MTC20154 |
17/21
MTC20154
Table 21. Receive / Transmit Protocol
Data set up and hold time are specified versus rising edge of CLKM
Receive / Transmit Interface
The digital interface is based on a 4 * 8.832 MHz (35.328 MHz) clock. The 8.832MHz 12 bits A/D output
signal or the D/A input signal are SIPO multiplexed over 4 parallel 35.328 MHz data lines in the following
table.
If OSR = 2 bit is selected, CLKNIB is used as nibble clock (17.664 MHz, disabled in normal mode), and
all the RXi, TXi, CLKWD periods are twice as long as in normal mode.
Table 22. Receive / Transmit Protocol
TX / TXE Signal Dynamic Range
The dynamic range of the signal for both DACs is 12 bits extracted from the available signed 16 bit repre-
sentation coming from the digital processor. The maximal positive number is 2
14
-1, the most negative
number is -2
14
, the 3 LSBs are ignored. Any signal exceeding these limits is clamped to the maximal value.
Figure 10. TX/TXE Bit Map
RX Signal Dynamic Range
The dynamic range of the signal from the ADC is limited to 13 bits. Those bits are converted to a signed
representation with a maximal positive number of 2
14
-1 and a most negative number of 2
14
. The 2 LSBs
are filled with ’0’.
Figure 11. RX Bit Map
Symbol
Ts
Th
TDv
Parameters
Setup Time
Hold time
Data Valid
min
7 ns
0.2 ns
0.5 ns
typ
–
–
–
max
–
–
4 ns
Remarks
N0
b0
b1
b2
b3
N1
b4
b5
b6
b7
N2
b8
b9
b10
b11
N3
b12
b13
b14
b15
RXD0 / TXD0 will contain
RXD1 / TXD1 will contain
RXD2 / TXD2 will contain
RXD3 / TXD3 will contain
sign
sign
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
n.u.
n.u.
n.u.
sign
b11
b12
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
0
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MTC20154-TQ-C2 | 制造商:STMicroelectronics 功能描述: |
| mtc20154-tq-c2tr | 制造商:STMicroelectronics 功能描述: |
| MTC20154-TQ-I1 | 制造商:STMicroelectronics 功能描述:INTEGRATED ADSL CMOS ANLG FRONT-END CIRCUIT 64TQFP - Tape and Reel |
| MTC20154TQI1A | 功能描述:電信集成電路 ASDL Analg Front End RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| MTC20154-TQ-I1A | 制造商:STMicroelectronics 功能描述:ADSL DMT/ATM IND T - Tape and Reel |
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