參數(shù)資料
型號(hào): MTC20154
廠(chǎng)商: 意法半導(dǎo)體
英文描述: INTEGRATED ADSL CMOS ANALOG FRONT-END CIRCUIT
中文描述: 集成ADSL CMOS模擬前端電路
文件頁(yè)數(shù): 15/21頁(yè)
文件大?。?/td> 533K
代理商: MTC20154
15/21
MTC20154
Linearity of ATU-C-TX
Linearity of the TX is defined by the IM3 product of two sinusoidal signals with frequencies f1 and f2 and
each with 0.25 Vpd amplitude (-6 dB FS) at the output of the pre-driver for the case of a total AGC = 0 dB.
Table 18. Linearity of ATU-C-TX
Table 19. Linearity of ATU-R-TX
Power Supply Rejection
The noise on the power supplies for the TX-path must be lower than the following: < 50 mVrms in band
white noise for AVDD.
< 15 mVrms in band white noise for Pre-driver AVDD.
Voltage Controlled Crystal Oscillator
A voltage controlled crystal oscillator driver is integrated in the MTC20154. Two nominal frequencies can
be used: 35.328 MHz or 17.664 MHz. The quartz crystal is connected between the pins XTALI and XTA-
LO.
The principle of the VCXO control is depicted on the figure beside.
Figure 8. Principle of the VCXO control (ATU-R)
f1 (0.25 Vpd)
f2 (0.25 Vpd)
S/IM3
(AGC = 0 dB)
300 kHz
200 kHz
59.5 dB @100 kHz
53.5 dB @400 kHz
43.5 dB @700 kHz
42.5 dB @800 kHz
500 kHz
400 kHz
59.5 dB @300 kHz
45.0 dB @600 kHz
700 kHz
600 kHz
48.0 dB @500 kHz
42.5 dB @800 kHz
f1 (0.25 Vpd)
f2 (0.25 Vpd)
S/IM3 (AGC = 0 dB)
80 k
70 k
59.5 dB (60 k/90 k)
AVDD
AVDD
AVDD/22 -> AVDD/2
VCOCAP
IVCO
MTC-20154
Ron=200
VCXOUT
AGND
R1
Rref
-15V
XTAL1
XTAL0
Ct
500k
+/- 30%
DAC
CTRLIN
8
Freq.
doubler
MUX
Clock
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