參數(shù)資料
型號(hào): MTC-8308
廠商: ALCATEL MICROELECTRONICS N V
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 40 MHz, RISC PROCESSOR
文件頁(yè)數(shù): 2/6頁(yè)
文件大小: 55K
代理商: MTC-8308
tation power of the microprocessor into
one of a DSP engine.
MTC-8308 contains a configurable
amount of directly accessible on-chip
memory (ROM). Sequencing of instruc-
tions is controlled by the program
counter. Bit-test and skip instructions
perform program flow control ope-
rations. Branching is handled by call-
and return instructions, jump instruc-
tions or by indirect loading of a com-
puted address into the program coun-
ter. An on-chip stack provides subrouti-
ne nesting and interrupt handling rou-
tines. Finally, both direct and indirect
addressing are possible for the data
RAM and the I/O-ports.
MTC-8308 efficiently supports produc-
tion testing. A mixed SCAN (for
core)/BIST (for memories) test scheme
achieves a high fault-coverage.
MTC-8308 is ideally suited for on-chip
processor applications within high
speed environments. The low on-chip
area cost required and the flexible
I/O organization make the MTC-
8308 concept useful for embedded
digital or mixed analog/digital appli-
cations.
2
MTC-8308
JMP
Direct jump
CALL
Subroutine call
RET
Return from subroutine
IJMP
Indirect jump
LDI
Load immediate data
LD
Load
ILD
Indirect load
ILDA
Indirect load with automatic increment of address register
ST
Store
IST
Indirect store
ISTA
Indirect store with automatic increment of address register
ADD
Addition
ADC
Addition with carry
SUB
Subtraction
SBC
Subtraction with carry
AND
Logical and
OR
Logical or
EOR
Logical exclusive or
LSL
Logical shift left
LSR
Logical shift right
ROL
Rotate left
ROR
Rotate right
SEC
Set carry
CLC
Clear carry
BCPY
Bit copy
SBRC
Skip next instruction if bit in register is cleared
SBRS
Skip next instruction if bit in register is set
SCC
Skip next instruction if carry flag is cleared
SCS
Skip next instruction if carry flag is set
SZC
Skip next instruction if zero flag is cleared
SZS
Skip next instruction if zero flag is set
Instruction Set
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