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參數(shù)資料
| 型號(hào)： | MT9315 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | CMOS Acoustic Echo Canceller |
| 中文描述： | 聲學(xué)回聲消除器的CMOS |
| 文件頁(yè)數(shù)： | 10/30頁(yè) |
| 文件大?。?/td> | 361K |
| 代理商： | MT9315 |
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Advance Information
MT9315
9
Figure 5 - ST-BUS 8 Bit Companded PCM I/O with D and C channels (Mode 3)
Figure 6 - ST-BUS 16 Bit 2’s complement linear PCM I/O (Mode 4)
C4i
F0i
Rin
Sout
ECA
Sin
Rout
ECA
PORT1
PORT2
indicates that an input channel is bypassed to an output channel
ST-BUS Mode 3 supports connection to 2B+D devices where timeslots 0 and 1 transport D and C channels and echo canceller I/O
channels are assigned to ST-BUS timeslot 2. Both PORT1 and PORT2 must be configured in ST-BUS Mode 3.
0
D
1
C
2
B
3
4
outputs = High impedance
inputs = don’t care
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
C4i
F0i
Rin
Sout
7 6 5 4 3 2 1 0
Sin
Rout
PORT1
PORT2
S141312 1110 9 8
ST-BUS Mode 4 allows 16 bit 2’s complement linear data to be transferred using ST-BUS I/O timing. Note that PORT1 and PORT2
need not necessarily both be in mode 4.
outputs = High impedance
inputs = don’t care
7 6 5 4 3 2 1 0
S141312 1110 9 8
7 6 5 4 3 2 1 0
S141312 1110 9 8
7 6 5 4 3 2 1 0
S141312 1110 9 8
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9315AE | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:CMOS Acoustic Echo Canceller |
| MT9315AP | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:CMOS Acoustic Echo Canceller |
| MT933 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:3.3V 10/100 Fast Ethernet Transceiver to MII |
| MT933CG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:3.3V 10/100 Fast Ethernet Transceiver to MII |
| MT933TP1N | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:3.3V 10/100 Fast Ethernet Transceiver to MII |
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